CONFIG_MII
Must be defined if CONFIG_FEC_MXC is defined.
-CONFIG_FEC_XCV_TYPE
- Defaults to MII100 for 100 Base-tx.
- RGMII selects 1000 Base-tx reduced pin count interface.
- RMII selects 100 Base-tx reduced pin count interface.
-
CONFIG_FEC_MXC_SWAP_PACKET
Forced on iff MX28.
Swaps the bytes order of all words(4 byte units) in the packet.
#error "CONFIG_MII has to be defined!"
#endif
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE MII100
-#endif
-
/*
* The i.MX28 operates with packets in big endian. We need to swap them before
* sending and after receiving.
priv->xcv_type = RGMII;
break;
default:
- priv->xcv_type = CONFIG_FEC_XCV_TYPE;
- printf("Unsupported interface type %d defaulting to %d\n",
- priv->interface, priv->xcv_type);
+ priv->xcv_type = MII100;
+ printf("Unsupported interface type %d defaulting to MII100\n",
+ priv->interface);
break;
}
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE 0x5b040000
#define CONFIG_FEC_MXC_PHYADDR 0x4
-#define CONFIG_FEC_XCV_TYPE RGMII
#define PHY_ANEG_TIMEOUT 20000
#endif /* __APALIS_IMX8X_H */
#define CONSOLE_DEV "ttymxc0"
#endif
-#define CONFIG_FEC_XCV_TYPE RGMII
-
/* Framebuffer */
#define CONFIG_SYS_LDB_CLOCK 28341000
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_FIXED_SPEED _1000BASET
/* USB Configs */
#define CONFIG_FACTORYSET
-/* ENET Config */
-#define CONFIG_FEC_XCV_TYPE RMII
-
/* ENET1 connects to base board and MUX with ESAI */
#define CONFIG_FEC_ENET_DEV 1
#define CONFIG_FEC_MXC_PHYADDR 0x0
/* Networking */
#define CONFIG_FEC_MXC_PHYADDR -1
-#define CONFIG_FEC_XCV_TYPE RGMII
#define FEC_QUIRK_ENET_MAC
#endif /* __CGTQMX8_H */
#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
/* Network */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
/* ENET1 */
/* Ethernet */
#define CONFIG_FEC_MXC_PHYADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define IMX_FEC_BASE ENET_BASE_ADDR
/* USB */
/* FEC ethernet */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
/* MMC Configs */
/* Ethernet Configs */
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define CONFIG_EXTRA_ENV_SETTINGS \
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC*/
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
/* ENET Config */
#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
#include <config_distro_bootcmd.h>
-/* ENET */
-#if defined(CONFIG_FEC_MXC)
-#define CONFIG_FEC_XCV_TYPE RGMII
-#endif /* CONFIG_FEC_MXC */
-
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
"kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* FEC */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#endif
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 4
#define FEC_QUIRK_ENET_MAC
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#endif /* __IMX8QM_MEK_H */
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#include <linux/stringify.h>
#endif /* __IMX8QM_ROM7720_H */
#define CONFIG_PCA953X
#endif
-/* Networking */
-#define CONFIG_FEC_XCV_TYPE RGMII
-
/* Misc configuration */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#if defined(CONFIG_FEC_MXC)
#define PHY_ANEG_TIMEOUT 20000
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define IMX_FEC_BASE 0x29950000
/* ENET1 Config */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
#define CONFIG_DISCOVER_PHY
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#if (CONFIG_FEC_ENET_DEV == 0)
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x2
-#define CONFIG_FEC_XCV_TYPE RMII
#elif (CONFIG_FEC_ENET_DEV == 1)
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
/* Default baudrate can be overridden by board! */
-/* FEC Ethernet on SoC */
-#ifdef CONFIG_FEC_MXC
-#ifndef CONFIG_FEC_XCV_TYPE
-#define CONFIG_FEC_XCV_TYPE RMII
-#endif
-#endif
-
/* NAND */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#endif
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 6
/* USB Configs */
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#define CONFIG_FEC_ENET_DEV 1
# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#endif /* CONFIG_CMD_USB */
-#if IS_ENABLED(CONFIG_FEC_MXC)
-# define CONFIG_FEC_XCV_TYPE RMII
-#endif /* CONFIG_FEC_MXC */
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"mmcdev=0\0" \
"mmcpart=2\0" \
/* Ethernet Configuration */
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
/* Framebuffer */
#define IMX_FEC_BASE ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_MXC_UART_BASE UART6_BASE_ADDR
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x1
-#define CONFIG_FEC_XCV_TYPE RMII
#endif
#endif
#ifndef __CONFIG_TQMA6_MBA6_H
#define __CONFIG_TQMA6_MBA6_H
-#define CONFIG_FEC_XCV_TYPE RGMII
-
#define CONFIG_FEC_MXC_PHYADDR 0x03
#define CONFIG_MXC_UART_BASE UART2_BASE
#define __CONFIG_TQMA6_WRU4_H
/* Ethernet */
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0x01
/* UART */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
/* ENET */
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
#define FEC_QUIRK_ENET_MAC
#define IMX_FEC_BASE 0x30BE0000
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 7
#define FEC_QUIRK_ENET_MAC
#define CONFIG_SYS_FSL_ESDHC_NUM 1
#define IMX_FEC_BASE ENET_BASE_ADDR
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
-
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS 0
#define CONFIG_FEC_ENET_DEV 0
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_UBOOT_SECTOR_START 0x2
#define CONFIG_UBOOT_SECTOR_COUNT 0x3fe