]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board_f: Fix types for board_get_usable_ram_top()
authorPali Rohár <pali@kernel.org>
Fri, 9 Sep 2022 15:32:40 +0000 (17:32 +0200)
committerTom Rini <trini@konsulko.com>
Fri, 23 Sep 2022 19:12:42 +0000 (15:12 -0400)
Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.

So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.

Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
35 files changed:
arch/arm/mach-imx/imx8m/soc.c
arch/arm/mach-mvebu/arm64-common.c
arch/arm/mach-rockchip/sdram.c
arch/arm/mach-stm32mp/dram_init.c
arch/arm/mach-sunxi/board.c
arch/arm/mach-tegra/board2.c
arch/mips/mach-jz47xx/jz4780/jz4780.c
arch/mips/mach-octeon/dram.c
arch/riscv/cpu/fu540/dram.c
arch/riscv/cpu/fu740/dram.c
arch/riscv/cpu/generic/dram.c
arch/x86/cpu/broadwell/sdram.c
arch/x86/cpu/coreboot/sdram.c
arch/x86/cpu/efi/payload.c
arch/x86/cpu/efi/sdram.c
arch/x86/cpu/intel_common/mrc.c
arch/x86/cpu/ivybridge/sdram.c
arch/x86/cpu/qemu/dram.c
arch/x86/cpu/quark/dram.c
arch/x86/cpu/slimbootloader/sdram.c
arch/x86/cpu/tangier/sdram.c
arch/x86/include/asm/mrc_common.h
arch/x86/include/asm/u-boot-x86.h
arch/x86/lib/fsp1/fsp_dram.c
arch/x86/lib/fsp2/fsp_dram.c
board/broadcom/bcmns3/ns3.c
board/imgtec/boston/ddr.c
board/menlo/m53menlo/m53menlo.c
board/raspberrypi/rpi/rpi.c
board/ti/am65x/evm.c
board/ti/j721e/evm.c
board/ti/j721s2/evm.c
board/xilinx/common/board.c
common/board_f.c
include/init.h

index d115b25a5b6c04398b8970117dc2da83b108ee4a..47c0a4f5c41c94dcc41e842cf3e803a4661e97fb 100644 (file)
@@ -327,7 +327,7 @@ phys_size_t get_effective_memsize(void)
        }
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong top_addr;
 
index 238edbe6ba56ef1f4022ef589e3d7e300f16aa4e..63f6af5fe8fa91d788156e0e2c452403061ccf97 100644 (file)
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 #define USABLE_RAM_SIZE                0x80000000ULL
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CONFIG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE);
 
index 705ec7ba6450f24deb2e36add51e5bc708d5de83..12f1d7ee5637662c8fabb4d1aa3e68913c4b11a5 100644 (file)
@@ -205,7 +205,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE;
 
index 920b99bb68f2698633957cfef730c791786f10b9..9346fa8546d2105ea9f91a4f37b06972bbf75d32 100644 (file)
@@ -40,7 +40,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index 8f7c894286dce46f63ca35ff2b494987a15ecc9b..62bb40b8c8905a9a51f469f0d44c88439cf52c84 100644 (file)
@@ -65,7 +65,7 @@ static struct mm_region sunxi_mem_map[] = {
 };
 struct mm_region *mem_map = sunxi_mem_map;
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /* Some devices (like the EMAC) have a 32-bit DMA limit. */
        if (gd->ram_top > (1ULL << 32))
index 8950e678a61900e53225b9c4a2ff2f3cf8f122d5..1994db0e15f50c771666743d1f90d182055c9db2 100644 (file)
@@ -401,7 +401,7 @@ int dram_init_banksize(void)
  * This function is called before dram_init_banksize(), so we can't simply
  * return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong ram_top;
 
index fefba12873b8914e1b031527304eedc9e08b5559..a57ec7802bbfc2a23d35c9ddaa353ce22723f867 100644 (file)
@@ -76,7 +76,7 @@ void board_init_f(ulong dummy)
 }
 #endif /* CONFIG_SPL_BUILD */
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return CONFIG_SYS_SDRAM_BASE + (256 * 1024 * 1024);
 }
index 4679260f17ad6d4771fe5578751fe0f6f71cb8ad..9c5789b1c8eb32994e0f8e616deed55a859375ce 100644 (file)
@@ -77,7 +77,7 @@ phys_size_t get_effective_memsize(void)
        return UBOOT_RAM_SIZE_MAX;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
                /* Map a maximum of 256MiB - return not size but address */
index 1fdc7837b8646f747edbdc8dcf8766aac7651c93..44e11bd56c5dd6c9d6799f1941ee199fa9348eff 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index 1dc77efeca550a5d3b727669ba911c2c976f108e..d6d4a41d25e36c849ee08af9d554a1f3e694d2e1 100644 (file)
@@ -20,7 +20,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_64BIT
        /*
index 1fdc7837b8646f747edbdc8dcf8766aac7651c93..44e11bd56c5dd6c9d6799f1941ee199fa9348eff 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index c104a849a5455dd7137e7ec2125714fc306ac336..1295121ae5b6e605fcb039e28911927c41919cf8 100644 (file)
@@ -25,7 +25,7 @@
 #include <asm/arch/pei_data.h>
 #include <asm/arch/pm.h>
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index 4a256bad4458ce957c0cb4c5b48cff369bfe3ebc..f4ee4cdf5d8c58ae05cc46346b516617e5a591f8 100644 (file)
@@ -27,7 +27,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        uintptr_t dest_addr = 0;
        int i;
index b7778565b19e7e9831c91c7d10bbf349046dc65d..1c28a43778ec070573c1a803a5264070b63a52d5 100644 (file)
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct efi_mem_desc *desc, *end;
        struct efi_entry_memmap *map;
index af65982fd0c09b1544da04e35cb1e6ce11419373..f3086db42c497258d69827d348c7042e08d00b27 100644 (file)
@@ -11,7 +11,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return (ulong)efi_get_ram_base() + gd->ram_size;
 }
index a97b0b7ceb411dd9335ca83b5a88fb5d0a987b08..a4918fbad61ab36d028988dc632dc400604710ea 100644 (file)
@@ -25,7 +25,7 @@ static const char *const ecc_decoder[] = {
        "active"
 };
 
-ulong mrc_common_board_get_usable_ram_top(ulong total_size)
+phys_size_t mrc_common_board_get_usable_ram_top(phys_size_t total_size)
 {
        struct memory_info *info = &gd->arch.meminfo;
        uintptr_t dest_addr = 0;
@@ -50,7 +50,7 @@ ulong mrc_common_board_get_usable_ram_top(ulong total_size)
 
        dest_addr = largest->start + largest->size;
 
-       return (ulong)dest_addr;
+       return (phys_size_t)dest_addr;
 }
 
 void mrc_common_dram_init_banksize(void)
index dd6b8753de6814fbf007aa399c594a433318e9f2..1a0ec433e654aa0083d33f4477a3ea0361144e95 100644 (file)
@@ -44,7 +44,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CMOS_OFFSET_MRC_SEED_S3                156
 #define CMOS_OFFSET_MRC_SEED_CHK       160
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index c1745501294ce23fc2a5b37f1327a42ce46de1bc..595c397d4a4fe009d498ef0e61b5cc505c76cf39 100644 (file)
@@ -71,7 +71,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return qemu_get_low_memory_size();
 }
index 2287dce12b52e69e90e1eb133ab5a2dfd0f7254f..8b1ee2d5ae57b78020db8121a73c5c4f045f3477 100644 (file)
@@ -184,7 +184,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return gd->ram_size;
 }
index c6f10e22e3154a171dded79b6d6ff0d7cbdc69b2..d748d5c7d4693380d1a6fae5bcd241ba8dd61430 100644 (file)
@@ -48,7 +48,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void)
  * @total_size: The memory size that u-boot occupies
  * Return:    : The top available memory address lower than 4GB
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sbl_memory_map_info *data;
        int i;
index afb08476ed3b9bd528daeb347d9df029c626dda1..8a4b1c5d2d729d5fefe685aeba7d7a5cf328125d 100644 (file)
@@ -204,7 +204,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sfi_table_simple *sb;
        struct sfi_mem_entry *mentry;
index 3d7f00c9f92b5c625f64fc0f87f251b3527614b6..a7f260a7079a76aea59b7ba65e34d94ff3d0f8e4 100644 (file)
@@ -47,7 +47,7 @@ int mrc_add_memory_area(struct memory_info *info, uint64_t start,
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-ulong mrc_common_board_get_usable_ram_top(ulong total_size);
+phys_size_t mrc_common_board_get_usable_ram_top(phys_size_t total_size);
 
 void mrc_common_dram_init_banksize(void);
 
index a1655e1cea5c155733ec1f9daf5de4fb46432bc1..4cf41e9354164e35a4561befbdb086d86c2bab9d 100644 (file)
@@ -77,7 +77,7 @@ int x86_cleanup_before_linux(void);
 void x86_enable_caches(void);
 void x86_disable_caches(void);
 int x86_init_cache(void);
-ulong board_get_usable_ram_top(ulong total_size);
+phys_size_t board_get_usable_ram_top(phys_size_t total_size);
 int default_print_cpuinfo(void);
 
 /* Set up a UART which can be used with printch(), printhex8(), etc. */
index cfd9b9f48c34eb2478def3e4bcabf4d2a931c023..5825221d1e5da5f060e92543d035bb01bfc94474 100644 (file)
@@ -34,7 +34,7 @@ int dram_init(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return fsp_get_usable_lowmem_top(gd->arch.hob_list);
 }
index 42d3892b7626bca48d44629bfead0ac1421d14c5..f9ea1ab3baad63c1c3a21273a7cd3e677e71fb13 100644 (file)
@@ -77,7 +77,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (!ll_boot_init())
                return gd->ram_size;
index 88036c16c951f7511ae888ab879ef101f4c3b497..26652e8f7733d5be02ed9daf6e4c3718974f63b1 100644 (file)
@@ -183,7 +183,7 @@ int dram_init_banksize(void)
 }
 
 /* Limit RAM used by U-Boot to the DDR first bank End region */
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return BCM_NS3_MEM_END;
 }
index 182f79b9182d9720b7cd964b445bfd1a013fe508..5b245cb447348dea96c59555f8327f4c4cd534dc 100644 (file)
@@ -23,7 +23,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        DECLARE_GLOBAL_DATA_PTR;
 
index 61ab3844b87833a27ed0f3e4d1604c5ca26d784e..4afc5aaa4360797100ca6a8500ec7c0ab8b8e4e1 100644 (file)
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static u32 mx53_dram_size[2];
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * WARNING: We must override get_effective_memsize() function here
index 17b8108cc88f84b5b841b8109ca78ab5b12c94c5..00afb352bd1ee01d70a0d875c8eb495489c3dd28 100644 (file)
@@ -335,7 +335,7 @@ static void set_fdt_addr(void)
 /*
  * Prevent relocation from stomping on a firmware provided FDT blob.
  */
-unsigned long board_get_usable_ram_top(unsigned long total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if ((gd->ram_top - fw_dtb_pointer) > SZ_64M)
                return gd->ram_top;
index 8a0a506a3e372dbdf3d682a64f57d14f13b13934..34ec3915f3d7b4a7e8414f12eb198951852fc3e5 100644 (file)
@@ -61,7 +61,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 5d090048ceb068c6c6eaba2505bc7361e6d60a4e..d6e431ead0efd96ba2597110a95931b7b7772e67 100644 (file)
@@ -57,7 +57,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 3c75ecfc0fe435e684e1c937693d0dd6bf90d293..e09adc8ad34eecfdb42ff02341cbfdf0ac332f9c 100644 (file)
@@ -46,7 +46,7 @@ int dram_init(void)
        return 0;
 }
 
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index e1f71049603fef7365c1880452a4bd54463036e3..391ce4dbd720cc469d316a7bc3d8d31401918bbc 100644 (file)
@@ -631,7 +631,7 @@ int embedded_dtb_select(void)
 #endif
 
 #if defined(CONFIG_LMB)
-ulong board_get_usable_ram_top(ulong total_size)
+phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index f92d7b9faf4cb7dfa7844d3e3dc7d5662a67484f..aee3f56d67ccbd73c13dcf0afa4e013a1c711421 100644 (file)
@@ -305,7 +305,7 @@ __weak int mach_cpu_init(void)
 }
 
 /* Get the top of usable RAM */
-__weak ulong board_get_usable_ram_top(ulong total_size)
+__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
        /*
index 02bb4ce13e74a3b2e0a7a83ba43cf53837c0f269..50a8302dc54c61918614836a684f322cfac33e99 100644 (file)
@@ -291,7 +291,7 @@ int show_board_info(void);
  *
  * @param total_size   Size of U-Boot (unused?)
  */
-ulong board_get_usable_ram_top(ulong total_size);
+phys_size_t board_get_usable_ram_top(phys_size_t total_size);
 
 int board_early_init_f(void);