Exynos: Clock: Fix exynos5_get_periph_rate for I2C.

Commit 2e82e9252695a612ab0cbf40fa0c7368515f6506 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec
keyboard working again on Samsung Chromebook (snow).

Changes in V2: reorder lines as requested by Joonyoung Shim.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Simon Glass <sjg@chroimum.org>
Tested-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
index c6455c2f3c49690358cc8fd052347e3f799bf640..2984867290774ed85cefba526843903d8e07ee8d 100644 (file)
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -423,8 +423,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
        case PERIPH_ID_I2C6:
        case PERIPH_ID_I2C7:
                src = EXYNOS_SRC_MPLL;
-               div = readl(&clk->div_top0);
-               sub_div = readl(&clk->div_top1);
+               div = readl(&clk->div_top1);
+               sub_div = readl(&clk->div_top0);
                break;
        default:
                debug("%s: invalid peripheral %d", __func__, peripheral);