Enable DDR52 modes, since the SD core supports correct switching now.
For completeness, list HS200 modes, however those were already enabled.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
};
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
status = "okay";
};
&sdhi2 {
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
mmc-hs400-1_8v;
max-frequency = <200000000>;
status = "okay";
vmmc-supply = <®_3p3v>;
vqmmc-supply = <®_1p8v>;
+ mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
bus-width = <8>;