]> git.dujemihanovic.xyz Git - u-boot.git/commit
riscv: Add option to print registers on exception
authorSean Anderson <seanga2@gmail.com>
Wed, 25 Dec 2019 05:27:44 +0000 (00:27 -0500)
committerAndes <uboot@andestech.com>
Mon, 10 Feb 2020 06:51:08 +0000 (14:51 +0800)
commitfd1f6e9a0bc7ba536c19478b2fd8619ecda6ec3b
treecf45bbb908850abc89bf9b23cba29ed561e3f547
parentd9f1cee286c8d039e290f624baeeb133b8d47a21
riscv: Add option to print registers on exception

When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
arch/riscv/Kconfig
arch/riscv/cpu/mtrap.S
arch/riscv/lib/interrupts.c