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apalis_t30: fix pcie port 0 and 1 pin muxing
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Tue, 8 May 2018 22:18:39 +0000 (00:18 +0200)
committerTom Warren <twarren@nvidia.com>
Thu, 10 May 2018 23:34:30 +0000 (16:34 -0700)
commitb4f901042807e59061a862adc265d8f899b2243f
tree45692db9e57f650f876cff5c66d13fc96a48effctree | snapshot
parent6ab8a2b0ee7541f6e44fd8dca8cbacd8b7f45e65commit | diff
apalis_t30: fix pcie port 0 and 1 pin muxing

Fix optional Apalis type specific 4 lane PCIe port 0 and Apalis PCIe
port 1 pin muxing.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
board/toradex/apalis_t30/pinmux-config-apalis_t30.h diff | blob | history
My U-Boot fork