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(parent: dd610e6) | patch
arm: zynq: Setup non zero SPL FIT load address
authorMichal Simek <michal.simek@xilinx.com>
Wed, 17 Oct 2018 10:16:12 +0000 (12:16 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 7 Nov 2018 09:07:31 +0000 (10:07 +0100)
commitacb83bb3ec4fd7f52c600244daa5d8caa53a4924
tree915e01c99bc5346e74251e28e98315412a6df26ftree | snapshot
parentdd610e616cceda16a81dfa6f9a134877f783548ccommit | diff
arm: zynq: Setup non zero SPL FIT load address

Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
include/configs/zynq-common.h diff | blob | history
My U-Boot fork