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(parent: f3c2cab) | patch
ARM: tegra210: set PLLE_PTS bit when enabling PLLE
authorStephen Warren <swarren@nvidia.com>
Tue, 22 Mar 2016 15:45:36 +0000 (09:45 -0600)
committerTom Warren <twarren@nvidia.com>
Tue, 29 Mar 2016 16:57:57 +0000 (09:57 -0700)
commit8f83759fac57cb25e23f6f75c001fe23aea47ee1
tree67e875a91022af1f4e6895bf474603a874bd33a2tree | snapshot
parentf3c2cab87878d2ecd5bd796ee940dff814aa3255commit | diff
ARM: tegra210: set PLLE_PTS bit when enabling PLLE

This bit needs to be set for system suspend/resume to work. This setting
will be documented in an updated TRM at some time in the future.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/mach-tegra/tegra210/clock.c diff | blob | history
My U-Boot fork