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(parent: d17e9d2) | patch
riscv: Change phys_addr_t and phys_size_t to 64-bit
authorBin Meng <bin.meng@windriver.com>
Sun, 31 Jan 2021 12:36:04 +0000 (20:36 +0800)
committerSimon Glass <sjg@chromium.org>
Wed, 3 Feb 2021 10:38:41 +0000 (03:38 -0700)
commit86c915628d582a36029ff1f6c4443b6e81e0d51f
tree7dd83c74c724239c300368f848944685113f4f97tree | snapshot
parentd17e9d2558ecbc2d6486555e6717396356b1f4e1commit | diff
riscv: Change phys_addr_t and phys_size_t to 64-bit

phys_addr_t and phys_size_t are currently defined as `unsigned long`,
but RV32 supports 34-bit physical address, hence both phys_addr_t and
phys_size_t should be defined to 64-bit using `unsigned long long`.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
arch/riscv/include/asm/types.h diff | blob | history
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