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(parent: 1bf048f) | patch
gpio: Add G7 Aspeed gpio controller driver
authorBilly Tsai <billy_tsai@aspeedtech.com>
Tue, 20 Aug 2024 07:27:36 +0000 (15:27 +0800)
committerTom Rini <trini@konsulko.com>
Wed, 28 Aug 2024 00:01:38 +0000 (18:01 -0600)
commit7c2c235a27c7b7198742f37fbe20877e17b6e3ea
treef3566c56e3c22c9f6caf0b762db1a92121c66e7ctree | snapshot
parent1bf048f21bdc3834de5aac216b1e7bfce90364d9commit | diff
gpio: Add G7 Aspeed gpio controller driver

In the 7th generation of the SoC from Aspeed, the control logic of the
GPIO controller has been updated to support per-pin control. Each pin now
has its own 32-bit register, allowing for individual control of the pin’s
value, direction, interrupt type, and other settings.

Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
drivers/gpio/Kconfig diff | blob | history
drivers/gpio/Makefile diff | blob | history
drivers/gpio/gpio-aspeed-g7.c [new file with mode: 0644] blob
My U-Boot fork