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(parent: 93330d4) | patch
arm: socfpga: Add onchip RAM size macro
authorLey Foon Tan <ley.foon.tan@intel.com>
Fri, 6 Mar 2020 08:55:18 +0000 (16:55 +0800)
committerMarek Vasut <marex@denx.de>
Tue, 31 Mar 2020 00:52:38 +0000 (02:52 +0200)
commit69f9c8bab83fff7228547f3cf01bf3c123faaaf4
tree656d3125daabf53b3fd0bf1368d74564e52c2879tree | snapshot
parent93330d4ce416208fe202e304e5a18166c57ac569commit | diff
arm: socfpga: Add onchip RAM size macro

Add OCRAM size macro for Gen5 and Arria 10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
arch/arm/mach-socfpga/include/mach/base_addr_a10.h diff | blob | history
arch/arm/mach-socfpga/include/mach/base_addr_ac5.h diff | blob | history
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