]> git.dujemihanovic.xyz Git - u-boot.git/commit
projects / u-boot.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: f4b297b) | patch
mmc: zynq_sdhci: Add clock phase delays for Versal
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Fri, 23 Oct 2020 10:59:02 +0000 (04:59 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 27 Oct 2020 07:13:34 +0000 (08:13 +0100)
commit2e819a77b9f5c011fd4ec9ac575494f9b77b1ac7
treee56147df0a26e3b93a32e7e5b4ccbd275b5ba320tree | snapshot
parentf4b297bbfde3ab53e5682ff779a13c61c6e12b37commit | diff
mmc: zynq_sdhci: Add clock phase delays for Versal

Define default values for input and output clock phase delays for
Versal. Also define functions for setting tapdelays based on these
clock phase delays.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
drivers/mmc/zynq_sdhci.c diff | blob | history
My U-Boot fork