From 57b84a0d5aff855c4670ac5e231917eecb8b4273 Mon Sep 17 00:00:00 2001
From: Reinhard Pfau <pfau@gdsys.de>
Date: Wed, 28 Oct 2015 11:46:30 +0100
Subject: [PATCH] iocon: reset FPGAs in last_stage_init()
- Reset FPGAs in last_stage_init()
Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
---
board/gdsys/405ep/iocon.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 3a51d864cd..7484624d13 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -381,7 +381,7 @@ int last_stage_init(void)
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
}
- /* wait for FPGA done */
+ /* wait for FPGA done; then reset FPGA */
for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
unsigned int ctr = 0;
@@ -396,6 +396,12 @@ int last_stage_init(void)
break;
}
}
+
+ pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0);
+ pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0);
+ udelay(10);
+ pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N,
+ MCFPGA_RESET_N);
}
if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
--
2.39.5