From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Date: Mon, 4 Sep 2017 02:47:52 +0000 (+0800)
Subject: armv8: ls1088a: fix the MMU table for pcie config space
X-Git-Tag: v2025.01-rc5-pxa1908~5833^2~3
X-Git-Url: http://git.dujemihanovic.xyz/img/login.html?a=commitdiff_plain;h=c4787f4b23a7903135f5884e756be3507308ca47;p=u-boot.git

armv8: ls1088a: fix the MMU table for pcie config space

The pcie config space of ls1088a is different from ls2080a.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
---

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index 6c74ee05d1..957e23b02a 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -107,10 +107,16 @@
 #define CONFIG_SYS_PCIE2_ADDR			(CONFIG_SYS_IMMR + 0x2500000)
 #define CONFIG_SYS_PCIE3_ADDR			(CONFIG_SYS_IMMR + 0x2600000)
 #define CONFIG_SYS_PCIE4_ADDR			(CONFIG_SYS_IMMR + 0x2700000)
+#ifdef CONFIG_ARCH_LS1088A
+#define CONFIG_SYS_PCIE1_PHYS_ADDR		0x2000000000ULL
+#define CONFIG_SYS_PCIE2_PHYS_ADDR		0x2800000000ULL
+#define CONFIG_SYS_PCIE3_PHYS_ADDR		0x3000000000ULL
+#else
 #define CONFIG_SYS_PCIE1_PHYS_ADDR		0x1000000000ULL
 #define CONFIG_SYS_PCIE2_PHYS_ADDR		0x1200000000ULL
 #define CONFIG_SYS_PCIE3_PHYS_ADDR		0x1400000000ULL
 #define CONFIG_SYS_PCIE4_PHYS_ADDR		0x1600000000ULL
+#endif
 
 /* Device Configuration */
 #define DCFG_BASE		0x01e00000