From f8a58bb2b550b0c57ee08136b08a209fd5b023e8 Mon Sep 17 00:00:00 2001 From: Christian Marangi <ansuelsmth@gmail.com> Date: Fri, 2 Aug 2024 15:53:07 +0200 Subject: [PATCH] clk: mediatek: mt7981: swap wrong clock-names for spi nodes Swap wrong clock-names for spi nodes as they were wrong and the spi-clk was referencing the sel-clk and the sel-clk was referencing the spi-clk. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> --- arch/arm/dts/mt7981.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi index d80eceb8d4..be0d42bc99 100644 --- a/arch/arm/dts/mt7981.dtsi +++ b/arch/arm/dts/mt7981.dtsi @@ -271,7 +271,7 @@ <&infracfg CK_INFRA_SPI0_SEL>; assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>, <&topckgen CK_INFRA_ISPI0>; - clock-names = "sel-clk", "spi-clk"; + clock-names = "spi-clk", "sel-clk"; interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; @@ -286,7 +286,7 @@ <&infracfg CK_INFRA_SPI1_SEL>; assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>, <&topckgen CK_INFRA_ISPI1>; - clock-names = "sel-clk", "spi-clk"; + clock-names = "spi-clk", "sel-clk"; status = "disabled"; }; @@ -299,7 +299,7 @@ <&infracfg CK_INFRA_SPI2_SEL>; assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>, <&topckgen CK_INFRA_ISPI0>; - clock-names = "sel-clk", "spi-clk"; + clock-names = "spi-clk", "sel-clk"; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; }; -- 2.39.5