From abd30371d33ea187216e9bf2687496eda8a11de6 Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Tue, 1 Jun 2021 16:42:02 +0200
Subject: [PATCH] arm64: zynqmp: Sync dp port location on zc1751 dc4
Historically dpdma and dpsub are placed at the end of files. Move nodes
there for easier comparison among dts files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
index aadda179c3..48acea62c8 100644
--- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
+++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
@@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm018-dc4
*
- * (C) Copyright 2015 - 2020, Xilinx, Inc.
+ * (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
@@ -115,14 +115,6 @@
status = "okay";
};
-&zynqmp_dpsub {
- status = "okay";
-};
-
-&zynqmp_dpdma {
- status = "okay";
-};
-
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
@@ -221,3 +213,11 @@
&watchdog0 {
status = "okay";
};
+
+&zynqmp_dpdma {
+ status = "okay";
+};
+
+&zynqmp_dpsub {
+ status = "okay";
+};
--
2.39.5