From a8b66ac87cc1d6ffd1b3693514e60edcf61fb678 Mon Sep 17 00:00:00 2001
From: Masahiro Yamada <yamada.masahiro@socionext.com>
Date: Thu, 27 Oct 2016 23:47:04 +0900
Subject: [PATCH] ARM: uniphier: fix DRAM init poll address for LD4, Pro4, sLD8
The status register should be polled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
---
arch/arm/mach-uniphier/dram/umc-ld4.c | 2 +-
arch/arm/mach-uniphier/dram/umc-pro4.c | 2 +-
arch/arm/mach-uniphier/dram/umc-sld8.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c
index 1ea6193f88..82ab63c732 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld4.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld4.c
@@ -149,7 +149,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,
int ret;
writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET);
- while (readl(dc_base + UMC_INITSET) & UMC_INITSTAT_INIT1ST)
+ while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST)
cpu_relax();
writel(0x00000101, dc_base + UMC_DIOCTLA);
diff --git a/arch/arm/mach-uniphier/dram/umc-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c
index f6c2d7f145..4a7aa78b7e 100644
--- a/arch/arm/mach-uniphier/dram/umc-pro4.c
+++ b/arch/arm/mach-uniphier/dram/umc-pro4.c
@@ -137,7 +137,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,
int phy, ret;
writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET);
- while (readl(dc_base + UMC_INITSET) & UMC_INITSTAT_INIT1ST)
+ while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST)
cpu_relax();
for (phy = 0; phy < nr_phy; phy++) {
diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c
index 61b1dc1a3a..568a007206 100644
--- a/arch/arm/mach-uniphier/dram/umc-sld8.c
+++ b/arch/arm/mach-uniphier/dram/umc-sld8.c
@@ -152,7 +152,7 @@ static int umc_ch_init(void __iomem *dc_base, void __iomem *ca_base,
int ret;
writel(UMC_INITSET_INIT1EN, dc_base + UMC_INITSET);
- while (readl(dc_base + UMC_INITSET) & UMC_INITSTAT_INIT1ST)
+ while (readl(dc_base + UMC_INITSTAT) & UMC_INITSTAT_INIT1ST)
cpu_relax();
writel(0x00000101, dc_base + UMC_DIOCTLA);
--
2.39.5