From 2f2a19757b4d74cb7af1f5d35dac05a9ac04acc7 Mon Sep 17 00:00:00 2001 From: Chuanhua Han <chuanhua.han@nxp.com> Date: Thu, 8 Aug 2019 17:04:58 +0800 Subject: [PATCH] armv8: fsl-layerscape: Update I2C clock divider By default, i2c input clock is programmed at platform clk / 2 in u-boot, but this is not correct for all the platforms, Update I2C clock divider's default values as per SoC (LS1012A, LS1028A, LX2160A and LS1088A). Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 54d03ae622..24c606a232 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -501,6 +501,10 @@ config SYS_FSL_I2C_CLK_DIV config SYS_FSL_IFC_CLK_DIV int "IFC clock divider" default 1 if ARCH_LS1043A + default 4 if ARCH_LS1012A + default 4 if ARCH_LS1028A + default 8 if ARCH_LX2160A + default 8 if ARCH_LS1088A default 2 help This is the divider that is used to derive IFC clock from Platform -- 2.39.5