From e368c206079bf7835000634247f3a8bfbba599ba Mon Sep 17 00:00:00 2001
From: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Date: Wed, 14 Oct 2015 16:32:00 +0200
Subject: [PATCH] drivers/ddr/fsl_ddr: Make SR_IE configurable
SR_IE(Self-refresh interrupt enable) is needed for
Hardware Based Self-Refresh. Make it configurable and let
board code handle the rest.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Reviewed-by: York Sun <yorksun@freescale.com>
---
drivers/ddr/fsl/ctrl_regs.c | 2 +-
include/fsl_ddr_sdram.h | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 8367c95cf8..8543679108 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -858,7 +858,7 @@ static void set_ddr_sdram_cfg_2(const unsigned int ctrl_num,
break;
}
}
-
+ sr_ie = popts->self_refresh_interrupt_en;
num_pr = 1; /* Make this configurable */
/*
diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index e5b6e03c8f..c79fce0898 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -324,6 +324,8 @@ typedef struct memctl_options_s {
unsigned int dqs_config; /* Use DQS? maybe only with DDR2? */
/* SREN - self-refresh during sleep */
unsigned int self_refresh_in_sleep;
+ /* SR_IE - Self-refresh interrupt enable */
+ unsigned int self_refresh_interrupt_en;
unsigned int dynamic_power; /* DYN_PWR */
/* memory data width to use (16-bit, 32-bit, 64-bit) */
unsigned int data_bus_width;
--
2.39.5