From e222b1f36fedb0363dbc21e0add7dc3848bae553 Mon Sep 17 00:00:00 2001
From: Prabhakar Kushwaha <prabhakar@freescale.com>
Date: Tue, 14 Jan 2014 11:34:26 +0530
Subject: [PATCH] powerpc/mpc85xx:Increase binary size for P, B & T series
 boards.

u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.

So, Increase the u-boot binary size to 768KB.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 board/freescale/c29xpcie/README             | 12 ++--
 board/freescale/p1010rdb/README.P1010RDB-PA | 12 ++--
 board/freescale/p1010rdb/README.P1010RDB-PB |  4 +-
 board/freescale/p1023rds/README             |  4 +-
 board/freescale/p1_p2_rdb/README            | 12 ++--
 board/freescale/p2041rdb/README             | 12 ++--
 board/freescale/t1040qds/README             | 12 ++--
 board/freescale/t104xrdb/README             | 12 ++--
 boards.cfg                                  | 66 ++++++++++-----------
 doc/README.b4860qds                         | 12 ++--
 include/configs/B4860QDS.h                  |  8 +--
 include/configs/BSC9131RDB.h                |  6 +-
 include/configs/BSC9132QDS.h                | 17 +++---
 include/configs/C29XPCIE.h                  | 10 +---
 include/configs/P1010RDB.h                  | 16 ++---
 include/configs/P1022DS.h                   | 12 ++--
 include/configs/P1023RDB.h                  |  8 +--
 include/configs/P1023RDS.h                  | 12 ++--
 include/configs/P1_P2_RDB.h                 | 14 ++---
 include/configs/P2020DS.h                   | 10 +---
 include/configs/P2041RDB.h                  | 16 ++---
 include/configs/T1040QDS.h                  | 16 ++---
 include/configs/T1040RDB.h                  | 16 ++---
 include/configs/T1042RDB_PI.h               | 16 ++---
 include/configs/T2080QDS.h                  | 16 ++---
 include/configs/T4240EMU.h                  |  4 +-
 include/configs/T4240QDS.h                  | 14 ++---
 include/configs/corenet_ds.h                | 16 ++---
 include/configs/p1_p2_rdb_pc.h              | 12 ++--
 include/configs/p1_twr.h                    |  8 +--
 include/configs/t4qds.h                     |  2 +-
 31 files changed, 184 insertions(+), 223 deletions(-)

diff --git a/board/freescale/c29xpcie/README b/board/freescale/c29xpcie/README
index 430f08244a..3bc396b35a 100644
--- a/board/freescale/c29xpcie/README
+++ b/board/freescale/c29xpcie/README
@@ -62,9 +62,9 @@ Build and program u-boot to NOR flash
 
 2. Program u-boot.bin into NOR flash
 	=> tftp $loadaddr $uboot
-	=> protect off eff80000 +$filesize
-	=> erase eff80000 +$filesize
-	=> cp.b $loadaddr eff80000 $filesize
+	=> protect off eff40000 +$filesize
+	=> erase eff40000 +$filesize
+	=> cp.b $loadaddr eff40000 $filesize
 
 3. Check SW5[1:4]= 1111 and SW5[6]=0, then power on.
 
@@ -73,9 +73,9 @@ Alternate NOR bank
 There are four banks in C29XPCIE board, example to change bank booting:
 1. Program u-boot.bin into alternate NOR bank
 	=> tftp $loadaddr $uboot
-	=> protect off e9f80000 +$filesize
-	=> erase e9f80000 +$filesize
-	=> cp.b $loadaddr e9f80000 $filesize
+	=> protect off e9f40000 +$filesize
+	=> erase e9f40000 +$filesize
+	=> cp.b $loadaddr e9f40000 $filesize
 
 2. Switch to alternate NOR bank
 	=> cpld_cmd reset altbank [bank]
diff --git a/board/freescale/p1010rdb/README.P1010RDB-PA b/board/freescale/p1010rdb/README.P1010RDB-PA
index 158a1b3152..cde246dde2 100644
--- a/board/freescale/p1010rdb/README.P1010RDB-PA
+++ b/board/freescale/p1010rdb/README.P1010RDB-PA
@@ -104,9 +104,9 @@ Build and burn u-boot to NOR flash
 
 2. Burn u-boot.bin into NOR flash
 	=> tftp $loadaddr $uboot
-	=> protect off eff80000 +$filesize
-	=> erase eff80000 +$filesize
-	=> cp.b $loadaddr eff80000 $filesize
+	=> protect off eff40000 +$filesize
+	=> erase eff40000 +$filesize
+	=> cp.b $loadaddr eff40000 $filesize
 
 3. Check SW4[1:4]= 1111 and SW6[4]=0, then power on.
 
@@ -115,9 +115,9 @@ Alternate NOR bank
 ==================
 1. Burn u-boot.bin into alternate NOR bank
 	=> tftp $loadaddr $uboot
-	=> protect off eef80000 +$filesize
-	=> erase eef80000 +$filesize
-	=> cp.b $loadaddr eef80000 $filesize
+	=> protect off eef40000 +$filesize
+	=> erase eef40000 +$filesize
+	=> cp.b $loadaddr eef40000 $filesize
 
 2. Switch to alternate NOR bank
 	=> mw.b ffb00009 1
diff --git a/board/freescale/p1010rdb/README.P1010RDB-PB b/board/freescale/p1010rdb/README.P1010RDB-PB
index cf459b339e..c5d1419445 100644
--- a/board/freescale/p1010rdb/README.P1010RDB-PB
+++ b/board/freescale/p1010rdb/README.P1010RDB-PB
@@ -149,11 +149,11 @@ Steps to program images to flash for different boot mode
 1. NOR boot
    => tftp 1000000 u-boot.bin
    For bank0
-   => pro off all;era eff80000 efffffff;cp.b 1000000 eff80000 $filesize
+   => pro off all;era eff40000 efffffff;cp.b 1000000 eff40000 $filesize
    set SW1[8]=0, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
 
    For bank1
-   => pro off all;era eef80000 eeffffff;cp.b 1000000 eef80000 $filesize
+   => pro off all;era eef40000 eeffffff;cp.b 1000000 eef40000 $filesize
    set SW1[8]=1, SW4[1:4]= 1111 and SW3[3:4]= 00, then power on the board
 
 2. NAND boot
diff --git a/board/freescale/p1023rds/README b/board/freescale/p1023rds/README
index 685f5daa99..d382551c4d 100644
--- a/board/freescale/p1023rds/README
+++ b/board/freescale/p1023rds/README
@@ -62,8 +62,8 @@ To program the image in the boot flash bank:
 NOR flash boot:
 	=> tftp 1000000 u-boot.bin
 	=> protect off all
-	=> erase eff80000 efffffff
-	=> cp.b 1000000 eff80000 80000
+	=> erase eff40000 efffffff
+	=> cp.b 1000000 eff40000 c0000
 
 NAND flash boot:
 	=> tftp 1000000 u-boot-nand.bin
diff --git a/board/freescale/p1_p2_rdb/README b/board/freescale/p1_p2_rdb/README
index cb664a5bd7..cd66e5878d 100644
--- a/board/freescale/p1_p2_rdb/README
+++ b/board/freescale/p1_p2_rdb/README
@@ -20,8 +20,8 @@ Memory Map
 0xef00_0000 - 0xef7f_ffff	Alternate bank		8MB
 0xe800_0000 - 0xefff_ffff	Boot bank		8MB
 
-0xef78_0000 - 0xef7f_ffff	Alternate u-boot address	512KB
-0xeff8_0000 - 0xefff_ffff	Boot u-boot address		512KB
+0xef74_0000 - 0xef7f_ffff	Alternate u-boot address	768KB
+0xeff4_0000 - 0xefff_ffff	Boot u-boot address		768KB
 
 Switch settings to boot from the NOR flash banks
 ------------------------------------------------
@@ -33,16 +33,16 @@ Flashing Images
 To place a new u-boot image in the alternate flash bank and then boot
 with that new image temporarily, use this:
 	tftp 1000000 u-boot.bin
-	erase ef780000 ef7fffff
-	cp.b 1000000 ef780000 80000
+	erase ef740000 ef7fffff
+	cp.b 1000000 ef740000 c0000
 
 Now to boot from the alternate bank change the SW4[8] from 0 to 1.
 
 To program the image in the boot flash bank:
 	tftp 1000000 u-boot.bin
 	protect off all
-	erase eff80000 ffffffff
-	cp.b 1000000 eff80000 80000
+	erase eff40000 ffffffff
+	cp.b 1000000 eff40000 c0000
 
 Using the Device Tree Source File
 ---------------------------------
diff --git a/board/freescale/p2041rdb/README b/board/freescale/p2041rdb/README
index 292d0d39cf..9b5539fff3 100644
--- a/board/freescale/p2041rdb/README
+++ b/board/freescale/p2041rdb/README
@@ -18,8 +18,8 @@ Boot from NOR flash
 2. Program image
 	=> tftp 1000000 u-boot.bin
 	=> protect off all
-	=> erase eff80000 efffffff
-	=> cp.b 1000000 eff80000 80000
+	=> erase eff40000 efffffff
+	=> cp.b 1000000 eff40000 c0000
 
 3. Program RCW
 	=> tftp 1000000 rcw.bin
@@ -30,8 +30,8 @@ Boot from NOR flash
 4. Program FMAN Firmware ucode
 	=> tftp 1000000 ucode.bin
 	=> protect off all
-	=> erase ef000000 ef0fffff
-	=> cp.b 1000000 ef000000 2000
+	=> erase eff00000 eff3ffff
+	=> cp.b 1000000 eff00000 2000
 
 5. Change DIP-switch
 	SW1[1-5] = 10110
@@ -50,11 +50,11 @@ Boot from SDCard
 3. Program the PBL image to SDCard
 	=> tftp 1000000 pbl_sd.bin
 	=> mmcinfo
-	=> mmc write 1000000 8 441
+	=> mmc write 1000000 8 672
 
 4. Program FMAN Firmware ucode
 	=> tftp 1000000 ucode.bin
-	=> mmc write 1000000 46a 10
+	=> mmc write 1000000 690 10
 
 5. Change DIP-switch
 	SW1[1-5] = 01100
diff --git a/board/freescale/t1040qds/README b/board/freescale/t1040qds/README
index f8b53b4212..6d380ae86d 100644
--- a/board/freescale/t1040qds/README
+++ b/board/freescale/t1040qds/README
@@ -118,16 +118,16 @@ Start Address  End Address      Description                     Size
 NOR Flash memory Map on T1040QDS
 --------------------------------
  Start          End             Definition                       Size
-0xEFF80000      0xEFFFFFFF      u-boot (current bank)            512KB
-0xEFF60000      0xEFF7FFFF      u-boot env (current bank)        128KB
-0xEFF40000      0xEFF5FFFF      FMAN Ucode (current bank)        128KB
+0xEFF40000      0xEFFFFFFF      u-boot (current bank)            768KB
+0xEFF20000      0xEFF3FFFF      u-boot env (current bank)        128KB
+0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)        128KB
 0xED300000      0xEFF3FFFF      rootfs (alt bank)                44MB + 256KB
 0xEC800000      0xEC8FFFF       Hardware device tree (alt bank)  1MB
 0xEC020000      0xEC7FFFFF      Linux.uImage (alt bank)          7MB + 875KB
 0xEC000000      0xEC01FFFF      RCW (alt bank)                   128KB
-0xEBF80000      0xEBFFFFFF      u-boot (alt bank)                512KB
-0xEBF60000      0xEBF7FFFF      u-boot env (alt bank)            128KB
-0xEBF40000      0xEBF5FFFF      FMAN ucode (alt bank)            128KB
+0xEBF40000      0xEBFFFFFF      u-boot (alt bank)                768KB
+0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)            128KB
+0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)            128KB
 0xE9300000      0xEBF3FFFF      rootfs (current bank)            44MB + 256KB
 0xE8800000      0xE88FFFFF      Hardware device tree (cur bank)  11MB + 512KB
 0xE8020000      0xE86FFFFF      Linux.uImage (current bank)      7MB + 875KB
diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README
index 2cd8219c84..11e03bd300 100644
--- a/board/freescale/t104xrdb/README
+++ b/board/freescale/t104xrdb/README
@@ -161,16 +161,16 @@ Start Address  End Address      Description                     Size
 NOR Flash memory Map
 ---------------------
  Start          End             Definition                       Size
-0xEFF80000      0xEFFFFFFF      u-boot (current bank)            512KB
-0xEFF60000      0xEFF7FFFF      u-boot env (current bank)        128KB
-0xEFF40000      0xEFF5FFFF      FMAN Ucode (current bank)        128KB
+0xEFF40000      0xEFFFFFFF      u-boot (current bank)            768KB
+0xEFF20000      0xEFF3FFFF      u-boot env (current bank)        128KB
+0xEFF00000      0xEFF1FFFF      FMAN Ucode (current bank)        128KB
 0xED300000      0xEFF3FFFF      rootfs (alt bank)                44MB + 256KB
 0xEC800000      0xEC8FFFF       Hardware device tree (alt bank)  1MB
 0xEC020000      0xEC7FFFFF      Linux.uImage (alt bank)          7MB + 875KB
 0xEC000000      0xEC01FFFF      RCW (alt bank)                   128KB
-0xEBF80000      0xEBFFFFFF      u-boot (alt bank)                512KB
-0xEBF60000      0xEBF7FFFF      u-boot env (alt bank)            128KB
-0xEBF40000      0xEBF5FFFF      FMAN ucode (alt bank)            128KB
+0xEBF40000      0xEBFFFFFF      u-boot (alt bank)                768KB
+0xEBF20000      0xEBF3FFFF      u-boot env (alt bank)            128KB
+0xEBF00000      0xEBF1FFFF      FMAN ucode (alt bank)            128KB
 0xE9300000      0xEBF3FFFF      rootfs (current bank)            44MB + 256KB
 0xE8800000      0xE88FFFFF      Hardware device tree (cur bank)  11MB + 512KB
 0xE8020000      0xE86FFFFF      Linux.uImage (current bank)      7MB + 875KB
diff --git a/boards.cfg b/boards.cfg
index 9276214441..07ae05b799 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -778,12 +778,12 @@ Active  powerpc     mpc85xx        -           -               sbc8548
 Active  powerpc     mpc85xx        -           -               socrates            socrates                             -                                                                                                                                 -
 Active  powerpc     mpc85xx        -           exmeritus       hww1u1a             HWW1U1A                              -                                                                                                                                 Kyle Moffett <Kyle.D.Moffett@boeing.com>
 Active  powerpc     mpc85xx        -           freescale       b4860qds            B4420QDS                             B4860QDS:PPC_B4420                                                                                                                -
-Active  powerpc     mpc85xx        -           freescale       b4860qds            B4420QDS_NAND                        B4860QDS:PPC_B4420,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                      -
-Active  powerpc     mpc85xx        -           freescale       b4860qds            B4420QDS_SPIFLASH                    B4860QDS:PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       b4860qds            B4420QDS_NAND                        B4860QDS:PPC_B4420,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                      -
+Active  powerpc     mpc85xx        -           freescale       b4860qds            B4420QDS_SPIFLASH                    B4860QDS:PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                  -
 Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS                             B4860QDS:PPC_B4860                                                                                                                -
-Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_NAND                        B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                      -
-Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_SPIFLASH                    B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                  -
-Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_SRIO_PCIE_BOOT              B4860QDS:PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_NAND                        B4860QDS:PPC_B4860,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                      -
+Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_SPIFLASH                    B4860QDS:PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       b4860qds            B4860QDS_SRIO_PCIE_BOOT              B4860QDS:PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                  -
 Active  powerpc     mpc85xx        -           freescale       bsc9131rdb          BSC9131RDB_NAND                      BSC9131RDB:BSC9131RDB,NAND                                                                                                        Poonam Aggrwal <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       bsc9131rdb          BSC9131RDB_NAND_SYSCLK100            BSC9131RDB:BSC9131RDB,NAND,SYS_CLK_100                                                                                            Poonam Aggrwal <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       bsc9131rdb          BSC9131RDB_SPIFLASH                  BSC9131RDB:BSC9131RDB,SPIFLASH                                                                                                    Poonam Aggrwal <poonam.aggrwal@freescale.com>
@@ -800,26 +800,26 @@ Active  powerpc     mpc85xx        -           freescale       c29xpcie
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_SPIFLASH                    C29XPCIE:C29XPCIE,36BIT,SPIFLASH                                                                                                  Po Liu <po.liu@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_NAND                        C29XPCIE:C29XPCIE,36BIT,NAND                                                                                                  Po Liu <po.liu@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS                              -                                                                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_NAND                         P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SDCARD                       P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                               -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_NAND                         P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                                 -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SDCARD                       P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                               -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SECURE_BOOT                  P3041DS:SECURE_BOOT                                                                                                               -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SPIFLASH                     P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                             -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SRIO_PCIE_BOOT               P3041DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SPIFLASH                     P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P3041DS_SRIO_PCIE_BOOT               P3041DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                             -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS                              -                                                                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SDCARD                       P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                               -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SDCARD                       P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                               -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SECURE_BOOT                  P4080DS:SECURE_BOOT                                                                                                               -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SPIFLASH                     P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                             -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SRIO_PCIE_BOOT               P4080DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SPIFLASH                     P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P4080DS_SRIO_PCIE_BOOT               P4080DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                             -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS                              -                                                                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_NAND                         P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SDCARD                       P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                               -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_NAND                         P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                                 -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SDCARD                       P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                               -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SECURE_BOOT                  P5020DS:SECURE_BOOT                                                                                                               -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SPIFLASH                     P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                             -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SRIO_PCIE_BOOT               P5020DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SPIFLASH                     P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5020DS_SRIO_PCIE_BOOT               P5020DS:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                             -
 Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS                              -                                                                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_NAND                         P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_SDCARD                       P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                               -
-Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_SPIFLASH                     P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                             -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_NAND                         P5040DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                                 -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_SDCARD                       P5040DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                               -
+Active  powerpc     mpc85xx        -           freescale       corenet_ds          P5040DS_SPIFLASH                     P5040DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                             -
 Active  powerpc     mpc85xx        -           freescale       mpc8536ds           MPC8536DS                            MPC8536DS                                                                                                                         -
 Active  powerpc     mpc85xx        -           freescale       mpc8536ds           MPC8536DS_36BIT                      MPC8536DS:36BIT                                                                                                                   -
 Active  powerpc     mpc85xx        -           freescale       mpc8536ds           MPC8536DS_NAND                       MPC8536DS:NAND                                                                                                                    -
@@ -964,28 +964,28 @@ Active  powerpc     mpc85xx        -           freescale       p2020ds
 Active  powerpc     mpc85xx        -           freescale       p2020ds             P2020DS_SDCARD                       P2020DS:SDCARD                                                                                                                    -
 Active  powerpc     mpc85xx        -           freescale       p2020ds             P2020DS_SPIFLASH                     P2020DS:SPIFLASH                                                                                                                  -
 Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB                             -                                                                                                                                 -
-Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_NAND                        P2041RDB:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                                -
-Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SDCARD                      P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                              -
+Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_NAND                        P2041RDB:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                                -
+Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SDCARD                      P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                              -
 Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SECURE_BOOT                 P2041RDB:SECURE_BOOT                                                                                                              -
-Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SPIFLASH                    P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                            -
-Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SRIO_PCIE_BOOT              P2041RDB:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                            -
+Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SPIFLASH                    P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                            -
+Active  powerpc     mpc85xx        -           freescale       p2041rdb            P2041RDB_SRIO_PCIE_BOOT              P2041RDB:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                            -
 Active  powerpc     mpc85xx        -           freescale       t4qds               T4160QDS                             T4240QDS:PPC_T4160                                                                                                                -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4160QDS_SDCARD                      T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                    -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4160QDS_SPIFLASH                    T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4160QDS_SDCARD                      T4240QDS:PPC_T4160,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                    -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4160QDS_SPIFLASH                    T4240QDS:PPC_T4160,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                  -
 Active  powerpc     mpc85xx        -           freescale       t4qds               T4240EMU                             T4240EMU:PPC_T4240                                                                                                                York Sun <yorksun@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS                             T4240QDS:PPC_T4240                                                                                                                -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_NAND	                T4240QDS:PPC_T4240,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000                                                                      -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SDCARD                      T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000                                                                    -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SPIFLASH                    T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000                                                                  -
-Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SRIO_PCIE_BOOT              T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_NAND	                T4240QDS:PPC_T4240,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000                                                                      -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SDCARD                      T4240QDS:PPC_T4240,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000                                                                    -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SPIFLASH                    T4240QDS:PPC_T4240,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000                                                                  -
+Active  powerpc     mpc85xx        -           freescale       t4qds               T4240QDS_SRIO_PCIE_BOOT              T4240QDS:PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000                                                                  -
 Active  powerpc     mpc85xx        -           freescale       t1040qds            T1040QDS                             T1040QDS:PPC_T1040                                                                                                             Poonam Aggrwal <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       t104xrdb            T1040RDB                             T1040RDB:PPC_T1040                                                                                                             Poonam Aggrwal  <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       t104xrdb            T1042RDB_PI                          T1042RDB_PI:PPC_T1042                                                                                                          Poonam Aggrwal  <poonam.aggrwal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS              T2080QDS:PPC_T2080
-Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SDCARD       T2080QDS:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
-Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SPIFLASH     T2080QDS:PPC_T2080,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
-Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_NAND         T2080QDS:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
-Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SRIO_PCIE_BOOT  T2080QDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF80000
+Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SDCARD       T2080QDS:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000
+Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SPIFLASH     T2080QDS:PPC_T2080,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000
+Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_NAND         T2080QDS:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000
+Active  powerpc     mpc85xx        -           freescale       t2080qds            T2080QDS_SRIO_PCIE_BOOT  T2080QDS:PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_36BIT_SDCARD          controlcenterd:36BIT,SDCARD                                                                                                       Dirk Eibach <eibach@gdsys.de>
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_36BIT_SDCARD_DEVELOP  controlcenterd:36BIT,SDCARD,DEVELOP                                                                                               Dirk Eibach <eibach@gdsys.de>
 Active  powerpc     mpc85xx        -           gdsys           p1022               controlcenterd_TRAILBLAZER           controlcenterd:TRAILBLAZER,SPIFLASH                                                                                               Dirk Eibach <eibach@gdsys.de>
diff --git a/doc/README.b4860qds b/doc/README.b4860qds
index 48ece4b835..f8a79dbb25 100644
--- a/doc/README.b4860qds
+++ b/doc/README.b4860qds
@@ -227,16 +227,16 @@ Start Address	End Address	Description	Size
 NOR Flash memory Map on B4860 and B4420QDS
 ------------------------------------------
  Start		 End		Definition			Size
-0xEFF80000	0xEFFFFFFF	u-boot (current bank)		512KB
-0xEFF60000	0xEFF7FFFF	u-boot env (current bank)	128KB
-0xEFF40000	0xEFF5FFFF	FMAN Ucode (current bank)	128KB
+0xEFF40000	0xEFFFFFFF	u-boot (current bank)		768KB
+0xEFF20000	0xEFF3FFFF	u-boot env (current bank)	128KB
+0xEFF00000	0xEFF1FFFF	FMAN Ucode (current bank)	128KB
 0xEF300000	0xEFF3FFFF	rootfs (alternate bank)		12MB + 256KB
 0xEE800000	0xEE8FFFFF	device tree (alternate bank)	1MB
 0xEE020000	0xEE6FFFFF	Linux.uImage (alternate bank)	6MB+896KB
 0xEE000000	0xEE01FFFF	RCW (alternate bank)		128KB
-0xEDF80000	0xEDFFFFFF	u-boot (alternate bank)		512KB
-0xEDF60000	0xEDF7FFFF	u-boot env (alternate bank)	128KB
-0xEDF40000	0xEDF5FFFF	FMAN ucode (alternate bank)	128KB
+0xEDF40000	0xEDFFFFFF	u-boot (alternate bank)		768KB
+0xEDF20000	0xEDF3FFFF	u-boot env (alternate bank)	128KB
+0xEDF00000	0xEDF1FFFF	FMAN ucode (alternate bank)	128KB
 0xED300000	0xEDF3FFFF	rootfs (current bank)		12MB+256MB
 0xEC800000	0xEC8FFFFF	device tree (current bank)	1MB
 0xEC020000	0xEC6FFFFF	Linux.uImage (current bank)	6MB+896KB
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index c66722946e..39c0b6d8c7 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -38,7 +38,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -115,7 +115,7 @@
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR		0xffe20000
@@ -608,7 +608,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -621,7 +621,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 584aba8d0e..fa89d13944 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -21,7 +21,7 @@
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_NAND
@@ -38,7 +38,7 @@
 #define CONFIG_SPL_MAX_SIZE		8192
 #define CONFIG_SPL_RELOC_TEXT_BASE	0x00100000
 #define CONFIG_SPL_RELOC_STACK		0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0
@@ -326,7 +326,7 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
 #define CONFIG_ENV_RANGE	(3 * CONFIG_ENV_SIZE)
 #elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE	/* Store ENV in memory only */
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 6170cbc81f..a973a49147 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -22,7 +22,7 @@
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 #define CONFIG_SYS_FSL_ERRATUM_IFC_A002769	1
 #ifdef CONFIG_SPIFLASH
@@ -30,7 +30,7 @@
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_NAND
@@ -47,7 +47,7 @@
 #define CONFIG_SPL_MAX_SIZE		8192
 #define CONFIG_SPL_RELOC_TEXT_BASE	0x00100000
 #define CONFIG_SPL_RELOC_STACK		0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0
@@ -55,7 +55,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0x8ff80000
+#define CONFIG_SYS_TEXT_BASE		0x8ff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -540,6 +540,7 @@ combinations. this should be removed later
  */
 #if defined(CONFIG_RAMBOOT_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_FSL_FIXED_MMC_LOCATION
 #define CONFIG_SYS_MMC_ENV_DEV		0
 #define CONFIG_ENV_SIZE			0x2000
 #elif defined(CONFIG_RAMBOOT_SPIFLASH)
@@ -554,7 +555,7 @@ combinations. this should be removed later
 #elif defined(CONFIG_NAND)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
 #define CONFIG_ENV_RANGE	(3 * CONFIG_ENV_SIZE)
 #elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE		/* Store ENV in memory only */
@@ -562,13 +563,9 @@ combinations. this should be removed later
 #define CONFIG_ENV_SIZE			0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
-#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
+#define CONFIG_ENV_SECT_SIZE	0x20000
 #endif
 
 #define CONFIG_LOADS_ECHO		/* echo on for serial download */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 8ec5cee8c1..69ca0a13e4 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -20,7 +20,7 @@
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_NAND
@@ -42,7 +42,7 @@
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
@@ -67,7 +67,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0xeff80000
+#define CONFIG_SYS_TEXT_BASE		0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -488,11 +488,7 @@
 #define CONFIG_ENV_OFFSET	CONFIG_SYS_NAND_BLOCK_SIZE
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000
 #endif
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index ea5cb6501b..62d7a84f4c 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -23,13 +23,13 @@
 #ifdef CONFIG_SDCARD
 #define CONFIG_RAMBOOT_SDCARD
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_NAND
@@ -46,7 +46,7 @@
 #define CONFIG_SPL_MAX_SIZE		8192
 #define CONFIG_SPL_RELOC_TEXT_BASE	0x00100000
 #define CONFIG_SPL_RELOC_STACK		0x00100000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0
@@ -57,11 +57,11 @@
 #ifdef CONFIG_NAND_SECBOOT	/* NAND Boot */
 #define CONFIG_RAMBOOT_NAND
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0xeff80000
+#define CONFIG_SYS_TEXT_BASE		0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -661,18 +661,14 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_ENV_SIZE		(16 * 1024)
 #define CONFIG_ENV_RANGE	(32 * CONFIG_ENV_SIZE) /* new block size 512K */
 #endif
-#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SYS_RAMBOOT)
 #define CONFIG_ENV_IS_NOWHERE		/* Store ENV in memory only */
 #define CONFIG_ENV_ADDR			(CONFIG_SYS_MONITOR_BASE - 0x1000)
 #define CONFIG_ENV_SIZE			0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 934a6cb7a6..9c9d72b605 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -32,7 +32,7 @@
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SPL_PAD_TO		0x18000
 #define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_MMC_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
@@ -62,7 +62,7 @@
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SPL_PAD_TO		0x18000
 #define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
@@ -96,7 +96,7 @@
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
@@ -128,7 +128,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -653,11 +653,7 @@
 #define CONFIG_ENV_SIZE		0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 7de6814a03..78a0aa2a7b 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -11,7 +11,7 @@
 #define __CONFIG_H
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_SYS_MONITOR_BASE
@@ -260,11 +260,7 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_ENV_OVERWRITE
 
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR		0xfff80000
-#else
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 
@@ -365,7 +361,7 @@ extern unsigned long get_clock_freq(void);
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xeff40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h
index 11c74ff5f5..d2aaf98113 100644
--- a/include/configs/P1023RDS.h
+++ b/include/configs/P1023RDS.h
@@ -32,7 +32,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_SYS_MONITOR_BASE
@@ -220,7 +220,7 @@ extern unsigned long get_clock_freq(void);
 
 /* NAND boot: 4K NAND loader config */
 #define CONFIG_SYS_NAND_SPL_SIZE	0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) + CONFIG_SYS_NAND_SPL_SIZE)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000 - CONFIG_SYS_NAND_SPL_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START	0x11000000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(0)
@@ -386,7 +386,7 @@ extern unsigned long get_clock_freq(void);
 #if defined(CONFIG_RAMBOOT_NAND)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_ENV_IS_NOWHERE	/* Store ENV in memory only */
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - 0x4000)
@@ -394,11 +394,7 @@ extern unsigned long get_clock_freq(void);
 #endif
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR		0xfff80000
-#else
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
@@ -506,7 +502,7 @@ extern unsigned long get_clock_freq(void);
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0x1f00000
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 85cb0767ef..726014a563 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -46,17 +46,17 @@
 #ifdef CONFIG_SDCARD
 #define CONFIG_RAMBOOT_SDCARD		1
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_RAMBOOT_SPIFLASH		1
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0xeff80000
+#define CONFIG_SYS_TEXT_BASE		0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -267,7 +267,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 /* NAND boot: 4K NAND loader config */
 #define CONFIG_SYS_NAND_SPL_SIZE	0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	((512 << 10) - 0x2000)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(CONFIG_SYS_INIT_L2_ADDR)
 #define CONFIG_SYS_NAND_U_BOOT_START	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	(0)
@@ -495,7 +495,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #if defined(CONFIG_RAMBOOT_NAND)
 	#define CONFIG_ENV_IS_IN_NAND	1
 	#define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-	#define CONFIG_ENV_OFFSET	((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)
+	#define CONFIG_ENV_OFFSET	((768*1024)+CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_RAMBOOT_SDCARD)
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_FSL_FIXED_MMC_LOCATION
@@ -513,11 +513,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 #else
 	#define CONFIG_ENV_IS_IN_FLASH	1
-	#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-	#define CONFIG_ENV_ADDR		0xfff80000
-	#else
 	#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-	#endif
 	#define CONFIG_ENV_SIZE		0x2000
 	#define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index ada6c7b871..7ef165e152 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -20,14 +20,14 @@
 #ifdef CONFIG_SDCARD
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0xf8f80000
+#define CONFIG_SYS_TEXT_BASE		0xf8f40000
 #define CONFIG_RESET_VECTOR_ADDRESS	0xf8fffffc
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
-#define CONFIG_SYS_TEXT_BASE		0xf8f80000
+#define CONFIG_SYS_TEXT_BASE		0xf8f40000
 #define CONFIG_RESET_VECTOR_ADDRESS	0xf8fffffc
 #endif
 
@@ -40,7 +40,7 @@
 #define CONFIG_MP		1	/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -578,11 +578,7 @@
 #define CONFIG_ENV_SECT_SIZE		0x10000
 #else
 #define CONFIG_ENV_IS_IN_FLASH	1
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR		0xfff80000
-#else
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 2b81cbe111..6934c616bb 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -41,7 +41,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -94,12 +94,12 @@
 	#define CONFIG_FSL_FIXED_MMC_LOCATION
 	#define CONFIG_SYS_MMC_ENV_DEV          0
 	#define CONFIG_ENV_SIZE			0x2000
-	#define CONFIG_ENV_OFFSET		(512 * 1097)
+	#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR		0xffe20000
@@ -512,14 +512,14 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -532,7 +532,7 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index a639530eeb..91b511bf5e 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -45,7 +45,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -93,12 +93,12 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_OFFSET		(512 * 1105)
+#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
@@ -583,17 +583,17 @@ unsigned long get_board_ddr_clk(void);
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/T1040RDB.h b/include/configs/T1040RDB.h
index d721139a1f..65b4b26a09 100644
--- a/include/configs/T1040RDB.h
+++ b/include/configs/T1040RDB.h
@@ -44,7 +44,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -92,12 +92,12 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_OFFSET		(512 * 1105)
+#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
@@ -521,17 +521,17 @@
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
index 2c02d9da58..104bb929ef 100644
--- a/include/configs/T1042RDB_PI.h
+++ b/include/configs/T1042RDB_PI.h
@@ -44,7 +44,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -92,12 +92,12 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_OFFSET		(512 * 1105)
+#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(3 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
@@ -529,17 +529,17 @@
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(4 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h
index b35e1073bf..d6d1f93684 100644
--- a/include/configs/T2080QDS.h
+++ b/include/configs/T2080QDS.h
@@ -60,7 +60,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -103,12 +103,12 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV	0
 #define CONFIG_ENV_SIZE		0x2000
-#define CONFIG_ENV_OFFSET	(512 * 1105)
+#define CONFIG_ENV_OFFSET	(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET	(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET	(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR		0xffe20000
@@ -544,14 +544,14 @@ unsigned long get_board_ddr_clk(void);
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -564,7 +564,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/T4240EMU.h b/include/configs/T4240EMU.h
index 5e228f3556..c81c4577e3 100644
--- a/include/configs/T4240EMU.h
+++ b/include/configs/T4240EMU.h
@@ -98,7 +98,7 @@
 #define CONFIG_SYS_INTERLAKEN
 
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
@@ -122,7 +122,7 @@
 	"bank_intlv=auto;"					\
 	"netdev=eth0\0"						\
 	"uboot=" __stringify(CONFIG_UBOOTPATH) "\0"			\
-	"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"		\
+"ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0"		\
 	"consoledev=ttyS0\0"					\
 	"ramdiskaddr=2000000\0"					\
 	"ramdiskfile=t4240emu/ramdisk.uboot\0"			\
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 1f1177be60..22019dcd2b 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -64,12 +64,12 @@
 #define CONFIG_ENV_IS_IN_MMC
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_OFFSET		(512 * 1097)
+#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR		0xffe20000
@@ -376,14 +376,14 @@ unsigned long get_board_ddr_clk(void);
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -396,7 +396,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 3a1826dddd..fa748f71cb 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -49,7 +49,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -95,12 +95,12 @@
 #define CONFIG_FSL_FIXED_MMC_LOCATION
 #define CONFIG_SYS_MMC_ENV_DEV          0
 #define CONFIG_ENV_SIZE			0x2000
-#define CONFIG_ENV_OFFSET		(512 * 1097)
+#define CONFIG_ENV_OFFSET		(512 * 1658)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			CONFIG_SYS_NAND_BLOCK_SIZE
-#define CONFIG_ENV_OFFSET		(5 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_ENV_OFFSET		(7 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 #define CONFIG_ENV_IS_IN_REMOTE
 #define CONFIG_ENV_ADDR		0xffe20000
@@ -518,14 +518,14 @@
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 545KB (1089 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
+ * about 825KB (1650 blocks), Env is stored after the image, and the env size is
+ * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
  */
 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(512 * 1680)
 #elif defined(CONFIG_NAND)
 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
-#define CONFIG_SYS_QE_FMAN_FW_ADDR	(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_ADDR	(8 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
 /*
  * Slave has no ucode locally, it can fetch this from remote. When implementing
@@ -538,7 +538,7 @@
 #define CONFIG_SYS_QE_FMAN_FW_ADDR	0xFFE00000
 #else
 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF40000
+#define CONFIG_SYS_QE_FMAN_FW_ADDR		0xEFF00000
 #endif
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index c6df11b8f1..95e23ac585 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -161,7 +161,7 @@
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SPL_PAD_TO		0x18000
 #define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_MMC_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
@@ -191,7 +191,7 @@
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SPL_PAD_TO		0x18000
 #define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
@@ -221,7 +221,7 @@
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
@@ -247,7 +247,7 @@
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0xeff80000
+#define CONFIG_SYS_TEXT_BASE		0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -842,11 +842,7 @@
 #define CONFIG_ENV_SIZE		0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 9837100e31..a7fe90ff3b 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -24,11 +24,11 @@
 #define CONFIG_SYS_RAMBOOT
 #define CONFIG_SYS_EXTRA_ENV_RELOC
 #define CONFIG_SYS_TEXT_BASE		0x11000000
-#define CONFIG_RESET_VECTOR_ADDRESS	0x1107fffc
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE		0xeff80000
+#define CONFIG_SYS_TEXT_BASE		0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -407,11 +407,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 54a5e3e260..74fef67f23 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -21,7 +21,7 @@
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
-- 
2.39.5