From 450d8eb54fe3016d7e265f9acca96575d2bf1f6e Mon Sep 17 00:00:00 2001
From: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Date: Wed, 16 Nov 2022 16:40:30 +0100
Subject: [PATCH] qspi: versal-net: Add condition for tapdelay register

Add CONFIG_ARCH_VERSAL_NET to select tapdelay register for versal-net.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2500dd688214e2ec2d54ed3fabbfee0b1ca861a6.1668613229.git.michal.simek@amd.com
---
 drivers/spi/zynqmp_gqspi.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 49facc46d3..48eff777df 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -104,7 +104,8 @@
 #define TAP_DLY_BYPASS_LQSPI_RX_VALUE	0x1
 #define TAP_DLY_BYPASS_LQSPI_RX_SHIFT	2
 #define GQSPI_DATA_DLY_ADJ_OFST		0x000001F8
-#define IOU_TAPDLY_BYPASS_OFST !IS_ENABLED(CONFIG_ARCH_VERSAL) ? \
+#define IOU_TAPDLY_BYPASS_OFST !(IS_ENABLED(CONFIG_ARCH_VERSAL) || \
+				 IS_ENABLED(CONFIG_ARCH_VERSAL_NET)) ? \
 				0xFF180390 : 0xF103003C
 #define GQSPI_LPBK_DLY_ADJ_LPBK_MASK	0x00000020
 #define GQSPI_FREQ_37_5MHZ		37500000
-- 
2.39.5