From 33043b396cae4d6b464592dd17bba075c9215826 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> Date: Mon, 1 Aug 2022 14:50:12 +0200 Subject: [PATCH] board: freescale: p1_p2_rdb_pc: Calculate offsets for eSDHC boot sector MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Correctly calculate offsets between SPL and proper U-Boot when new config option CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR for generating eSDHC boot sector is enabled. Otherwise SPL would not be able to boot proper U-Boot. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- include/configs/p1_p2_rdb_pc.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index bd2d657f1c..d201c72a6c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -89,7 +89,11 @@ #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR +#define CONFIG_SYS_MMC_U_BOOT_OFFS (CONFIG_SPL_PAD_TO - CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR_DATA*512) +#else #define CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SPL_PAD_TO +#endif #elif defined(CONFIG_SPIFLASH) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_TEXT_BASE -- 2.39.5