From: Marek Behún <marek.behun@nic.cz>
Date: Thu, 11 Nov 2021 15:35:44 +0000 (+0100)
Subject: pci: pci_mvebu, pci_aardvark: Fix size of configuration cache
X-Git-Tag: v2025.01-rc5-pxa1908~1611^2~2
X-Git-Url: http://git.dujemihanovic.xyz/img/html/static/gitweb.css?a=commitdiff_plain;h=e967c84a6d211562ff800a00b0c30d7aa808ae4b;p=u-boot.git

pci: pci_mvebu, pci_aardvark: Fix size of configuration cache

Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
---

diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index 4e94b776c5..8abbc3ffe8 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -202,7 +202,7 @@ struct pcie_advk {
 	int			sec_busno;
 	struct udevice		*dev;
 	struct gpio_desc	reset_gpio;
-	u32			cfgcache[0x34 - 0x10];
+	u32			cfgcache[(0x34 - 0x10) / 4];
 	bool			cfgcrssve;
 };
 
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 14cd82db6f..2d1624deb2 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -88,7 +88,7 @@ struct mvebu_pcie {
 	unsigned int mem_attr;
 	unsigned int io_target;
 	unsigned int io_attr;
-	u32 cfgcache[0x34 - 0x10];
+	u32 cfgcache[(0x34 - 0x10) / 4];
 };
 
 /*