From ecd7ab56284613a92975a9ea5063015cb2a6ce43 Mon Sep 17 00:00:00 2001
From: Peng Fan <peng.fan@nxp.com>
Date: Wed, 10 Jan 2018 13:20:33 +0800
Subject: [PATCH] imx: bootaux: support i.MX8M
Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm/mach-imx/imx_bootaux.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index 02728514b7..6256b3a778 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -6,7 +6,9 @@
#include <common.h>
#include <asm/io.h>
+#include <asm/mach-imx/sys_proto.h>
#include <command.h>
+#include <imx_sip.h>
#include <linux/compiler.h>
int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
@@ -24,14 +26,21 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data)
writel(pc, M4_BOOTROM_BASE_ADDR + 4);
/* Enable M4 */
+#ifdef CONFIG_MX8M
+ call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0);
+#else
clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET,
SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK);
+#endif
return 0;
}
int arch_auxiliary_core_check_up(u32 core_id)
{
+#ifdef CONFIG_MX8M
+ return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0);
+#else
unsigned int val;
val = readl(SRC_BASE_ADDR + SRC_M4_REG_OFFSET);
@@ -40,6 +49,7 @@ int arch_auxiliary_core_check_up(u32 core_id)
return 0; /* assert in reset */
return 1;
+#endif
}
/*
--
2.39.5