From 7598759d194e09a8301f2912739feda9cb7dcb70 Mon Sep 17 00:00:00 2001
From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Fri, 26 Nov 2021 11:42:50 +0100
Subject: [PATCH] x86: pci: Use PCI_CONF1_ADDRESS() macro
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x86 platform uses standard format of Config Address for PCI Configuration
Mechanism #1. So use new U-Boot macro PCI_CONF1_ADDRESS().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
---
arch/x86/cpu/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index d4f9290ca7..8a992ed823 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -20,7 +20,7 @@
int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep,
enum pci_size_t size)
{
- outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR);
+ outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR);
switch (size) {
case PCI_SIZE_8:
*valuep = inb(PCI_REG_DATA + (offset & 3));
@@ -39,7 +39,7 @@ int pci_x86_read_config(pci_dev_t bdf, uint offset, ulong *valuep,
int pci_x86_write_config(pci_dev_t bdf, uint offset, ulong value,
enum pci_size_t size)
{
- outl(bdf | (offset & 0xfc) | PCI_CFG_EN, PCI_REG_ADDR);
+ outl(PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf), offset), PCI_REG_ADDR);
switch (size) {
case PCI_SIZE_8:
outb(value, PCI_REG_DATA + (offset & 3));
--
2.39.5