From 6d3a10f73ece7ffb736890c10e023222612a4aa0 Mon Sep 17 00:00:00 2001
From: Roy Zang <tie-fei.zang@freescale.com>
Date: Fri, 9 Jan 2009 16:02:35 +0800
Subject: [PATCH] Change PCIE1&2 deciide logic on MPC8544DS board more readable
The IO port selection for MPC8544DS board:
Port cfg_io_ports
PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7
PCIE2 0x4, 0x5, 0x6, 0x7
PCIE3 0x6, 0x7
This patch changes the PCIE12 and PCIE2 logic more readable.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
---
board/freescale/mpc8544ds/mpc8544ds.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 13c55fd37f..977731289b 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -188,7 +188,7 @@ pci_init_board(void)
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR;
struct pci_controller *hose = &pcie1_hose;
int pcie_ep = (host_agent == 5);
- int pcie_configured = io_sel & 6;
+ int pcie_configured = io_sel >= 2;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
@@ -251,7 +251,7 @@ pci_init_board(void)
volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR;
struct pci_controller *hose = &pcie2_hose;
int pcie_ep = (host_agent == 3);
- int pcie_configured = io_sel & 4;
+ int pcie_configured = io_sel >= 4;
struct pci_region *r = hose->regions;
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
--
2.39.5