From 5f723a3b98c630bde33de74351f2121691fdef14 Mon Sep 17 00:00:00 2001
From: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Date: Fri, 20 Jun 2008 10:41:05 +0200
Subject: [PATCH] avr32: Enable SPI flash support on ATNGW100

The ATNGW100 has 8MB DataFlash on board. Give users access to it through
the new SPI flash framework.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
---
 board/atmel/atngw100/atngw100.c | 25 +++++++++++++++++++++++++
 include/configs/atngw100.h      |  6 ++++++
 2 files changed, 31 insertions(+)

diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c
index 375f0e7e17..f2c3e79799 100644
--- a/board/atmel/atngw100/atngw100.c
+++ b/board/atmel/atngw100/atngw100.c
@@ -60,6 +60,9 @@ int board_early_init_f(void)
 #if defined(CONFIG_MMC)
 	gpio_enable_mmci();
 #endif
+#if defined(CONFIG_ATMEL_SPI)
+	gpio_enable_spi0(1 << 0);
+#endif
 
 	return 0;
 }
@@ -89,3 +92,25 @@ void board_init_info(void)
 	gd->bd->bi_phy_id[0] = 0x01;
 	gd->bd->bi_phy_id[1] = 0x03;
 }
+
+/* SPI chip select control */
+#ifdef CONFIG_ATMEL_SPI
+#include <spi.h>
+
+#define ATNGW100_DATAFLASH_CS_PIN	GPIO_PIN_PA3
+
+int spi_cs_is_valid(unsigned int bus, unsigned int cs)
+{
+	return bus == 0 && cs == 0;
+}
+
+void spi_cs_activate(struct spi_slave *slave)
+{
+	gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
+}
+
+void spi_cs_deactivate(struct spi_slave *slave)
+{
+	gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
+}
+#endif /* CONFIG_ATMEL_SPI */
diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h
index 3fc9975637..7ac51b543c 100644
--- a/include/configs/atngw100.h
+++ b/include/configs/atngw100.h
@@ -114,6 +114,8 @@
 #define CONFIG_CMD_FAT
 #define CONFIG_CMD_JFFS2
 #define CONFIG_CMD_MMC
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
 
 #undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_FPGA
@@ -126,6 +128,10 @@
 #define CFG_NR_PIOS			5
 #define CFG_HSDRAMC			1
 #define CONFIG_MMC			1
+#define CONFIG_ATMEL_SPI		1
+
+#define CONFIG_SPI_FLASH		1
+#define CONFIG_SPI_FLASH_ATMEL		1
 
 #define CFG_DCACHE_LINESZ		32
 #define CFG_ICACHE_LINESZ		32
-- 
2.39.5