Michal Simek [Mon, 7 Mar 2022 15:48:17 +0000 (16:48 +0100)]
cmd: test: pinmux: Do not check all empty spaces
There is really no value to check empty spaces. That's why use
ut_assert_nextlinen() instead of ut_assert_nextline().
This change ensures that PINMUX_SIZE can be increased without changing
tests.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/03aecf4c67ec8d72bf2a90baf1516fc5bd300fe0.1646668094.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:45:42 +0000 (15:45 +0100)]
net: phy: Add support for ethernet-phy-id with gpio reset
Ethernet phy like dp83867 is using strapping resistors to setup PHY
address. On Xilinx boards strapping is setup on wires which are connected
to SOC where internal pull ups/downs influnce phy address. That's why there
is a need to setup pins properly (via pinctrl driver for example) and then
perform phy reset. I can be workarounded by reset gpio done for mdio bus
but this is not working properly when multiply phys sitting on the same
bus. That's why it needs to be done via ethernet-phy-id driver where dt
binding has gpio reset per phy.
DT binding is available here:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml
The driver is are reading the vendor and device id from valid phy node
using ofnode_read_eth_phy_id() and creating a phy device.
Kconfig PHY_ETHERNET_ID symbol is used because not every platform has gpio
support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/70ab7d71c812b2c972d48c129e416c921af0d7f5.1645627539.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:45:41 +0000 (15:45 +0100)]
net: phy: Remove static return type for phy_device_create()
Remove static return type for phy_device_create() to avoid file scope for
this function. Also add required prototype in phy.h.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/1517f4053403fbd53e899d500e7485d068a4f0b6.1645627539.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:45:40 +0000 (15:45 +0100)]
net: phy: Add new read ethernet phy id function
Add new function to get ethernet phy id from compatible property
of the mdio phy node.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Link: https://lore.kernel.org/r/16019efb3820a50330935fdaae191cec1f101b5c.1645627539.git.michal.simek@xilinx.com
Michal Simek [Mon, 7 Mar 2022 07:43:49 +0000 (08:43 +0100)]
MAINTAINERS: Remove duplicated entry for ehci-zynq.c
ehci-zynq.c is assigned to Zynq and ZynqMP that's why remove one.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d97779178fa56f1c6af40f5604b0bf349002cd36.1646639027.git.michal.simek@xilinx.com
Neal Frager [Wed, 2 Mar 2022 14:12:02 +0000 (15:12 +0100)]
arm64: zynqmp: add support for zcu106 rev1.0
This patch adds psu_init for Xilinx ZCU106 rev1.0. Xilinx ZCU106 rev1.0 has
newer x16 DDR4 memories and it is SW compatible with revA.
Signed-off-by: Neal Frager <neal.frager@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/997b3e23457e4d24ce0e197d742382aaec36c2b2.1646230318.git.michal.simek@xilinx.com
Sai Pavan Boddu [Tue, 1 Mar 2022 08:16:52 +0000 (09:16 +0100)]
i2c: i2c-cdns: Prevent early termination of write
During sequential loading of data, hold the bus to prevent controller
from sending stop signal in case no data is available in fifo.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2407b39d305999cb42438c5423aebc3b514acabb.1646122610.git.michal.simek@xilinx.com
Sai Pavan Boddu [Tue, 1 Mar 2022 08:16:51 +0000 (09:16 +0100)]
i2c: i2c-cdns: Fix write transaction state
Start write transfer after loading data to FIFO.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f0b3e443daa7758e00dfdcc245cf6b2120b0e907.1646122610.git.michal.simek@xilinx.com
Sai Pavan Boddu [Tue, 1 Mar 2022 08:16:50 +0000 (09:16 +0100)]
i2c: i2c-cdns: Start read transaction after write to transfer_size reg
Avoid a race condition where read transaction is started
keeping expected bytes as 0. Which sometimes would result in sending
STOP signal as no data is expected. Observed on QEMU platform.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/487c8026791bfd60719403a2df2c54bb0ae99232.1646122610.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:52:03 +0000 (15:52 +0100)]
dma: xilinx: Add Display Port DMA driver
Display Port (DP) has own dma driver that's why add this skeleton driver
only for handling power domain setting and send configuration object to
PMUFW to enable it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/fe8bc313bcd430b04e9fa6fb770d5799ef28b350.1645627920.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:52:02 +0000 (15:52 +0100)]
video: Add skeleton driver for ZynqMP Display port driver
The reason for this driver is to use call power management driver to enable
it in PMUFW. There is missing functionality now but should be added in
near future.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:36:05 +0000 (15:36 +0100)]
mmc: zynq_sdhci: Add support for dynamic configuration
Add support for dynamic configuration which will takes care of
configuring the SD secure space configuration registers using firmware
APIs, performing SD reset assert and deassert.
High level sequence:
- Check for the PM dynamic configuration support, if no error proceed
with SD dynamic configurations(next steps) otherwise skip the dynamic
configuration.
- Put the SD Controller in reset.
- Configure SD Fixed configurations.
- Configure the SD Slot Type.
- Configure the BASE_CLOCK.
- Configure the 8-bit support.
- Bring the SD Controller out of reset.
In the above steps, apart from the Fixed configurations, remaining all
configurations are dynamic and they will be read from devicetree.
And also remove hardcoded secure register writes, as dynamic sd config
support is added.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/030a3ec041ff3efebd574b4d2b477ad85f12cbce.1645626962.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:36:04 +0000 (15:36 +0100)]
lib: div64: Add support for round up of div64_u64
Most of the frequencies are not rounded up to a proper number.
When we need to devide these frequencies to get a number for example
frequency in Mhz, we see it as one less than the actual intended value.
Ex: If we want to get Mhz from frequency 199999994hz, we will calculate
it using div64_u64(
199999994,
1000000) and we will get 199Mhz in place
of 200Mhz.
Add a macro DIV64_U64_ROUND_UP for rounding up div64_u64. This is taken
from linux 'commit
68600f623d69("mm: don't miss the last page because of
round-off error")'.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f9fdcba76cd692ae436b1d7883b490e3dc207231.1645626962.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:36:03 +0000 (15:36 +0100)]
firmware: zynqmp: Add support for set sd config and is function supported
Add firmware API's to set SD configuration and to check if a purticular
function is supported.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f64fa2f73e4775e9ad2f4d91339d6c74b43116a3.1645626962.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:36:02 +0000 (15:36 +0100)]
firmware: zynqmp: Add and update firmware enums
Update enum pm_ioctl_id with more IOCTLs.
Add enum pm_sd_config_type to support dynamic sd configuration.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9aba090ec11d2591dbe6978e73e64384873c99fc.1645626962.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:42 +0000 (16:17 +0100)]
arm64: zynqmp: Fix level of gpio reset for usb on kv260 boards
Active level is low that's why it should be fixed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/86b3a96ce990b0ee0adab221146b5a5c751bd4a9.1645629459.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:41 +0000 (16:17 +0100)]
arm64: zynqmp: Enable DP driver for SOMs
The main reason is to send pmufw cfg overlay from U-Boot to PMUFW to enable
access to DP. Overlay is sent when cls command is called and for that IP
has to be enabled in carrier cards.
And IP needs to be also enabled in SOM dt because with DTB reselection new
DT is not parsed in pre reloc U-Boot instance. It is called from board_f
via embedded_dtb_select(). That's why bind function is not able to allocate
memory and it ends up with error:
"Video device 'display@
fd4a0000' cannot allocate frame buffer memory
-ensure the device is set up before relocation"
To avoid this situation DP is placed also to SOM where bind function is
called and frame buffer memory is allocated and just reused after DTB
reselection. Result is the same. There could be a problem in Linux with
different DP configurations but that's need to be solved there because
console should be on from u-boot already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/c4f31641f917fddb09d976f56875057c658f264c.1645629459.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:40 +0000 (16:17 +0100)]
arm64: zynqmp: Switch to ethernet-phy-id in kv260
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/73b64f1a2b873b4e26bd2b365364bdf313794ae2.1645629459.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:39 +0000 (16:17 +0100)]
arm64: zynqmp: Use assigned-clock-rates for setting up clock in SOM
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up proper clock for USBs
and SDs.
Also setup proper bus width for SD cards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/d9f80b2551bd246c3d7ecb09b516806c8dc83ed9.1645629459.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:38 +0000 (16:17 +0100)]
arm64: zynqmp: Setup clock for DP and DPDMA
Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/04454c50d0d13e450976942085d763ab5aa38f98.1645629459.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 15:17:37 +0000 (16:17 +0100)]
arm64: zynqmp: Move usb hub from i2c to usb node
Based on upstream discussion based on link below usb hub should be placed
to usb node directly as child node. Based on this Linux driver was updated
and the same change should be also reflected in kv260 board.
Link: https://lore.kernel.org/all/CAL_JsqJZBbu+UXqUNdZwg-uv0PAsNg55026PTwhKr5wQtxCjVQ@mail.gmail.com/
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/aa18df1978f161b933e6cdc6cd99c807b5f74398.1645629459.git.michal.simek@xilinx.com
Michal Simek [Tue, 1 Mar 2022 08:13:20 +0000 (09:13 +0100)]
microblaze: Do not place u-boot to reserved memory location
Microblaze can also have reserved space in DT which u-boot has to avoid to
placing self to that location. The same change was done in Zynqmp by commit
ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location").
This feature was tested with this memory description on kc705:
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
alloc@
b00000000 {
reg = <0xb0000000 0x10000000>;
no-map;
};
alloc@
a8000000 {
reg = <0xa8000000 0x00010000>;
no-map;
};
};
And in U-Boot log you can check u-boot relocation address and reserved
locations.
U-Boot
2022.01-03974-gb1b4c2dea9b9 (Feb 25 2022 - 11:59:48 +0100)
Model: Xilinx MicroBlaze
DRAM: 1 GiB
Flash: 128 MiB
Loading Environment from nowhere... OK
In: serial
Out: serial
Err: serial
Model: Xilinx MicroBlaze
Net: AXI EMAC:
40c00000, phyaddr 7, interface gmii
eth0: ethernet@
40c00000
U-BOOT for microblaze-generic
U-Boot-mONStR> bdi
...
DRAM bank = 0x00000000
-> start = 0x80000000
-> size = 0x40000000
...
relocaddr = 0xaff69000
...
lmb_dump_all:
memory.cnt = 0x1
memory[0] [0x80000000-0xbfffffff], 0x40000000 bytes flags: 0
reserved.cnt = 0x3
reserved[0] [0xa8000000-0xa800ffff], 0x00010000 bytes flags: 4
reserved[1] [0xafe87bb0-0xafffffff], 0x00178450 bytes flags: 0
reserved[2] [0xb0000000-0xbfffffff], 0x10000000 bytes flags: 4
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ea0a8ccce723478eb518f6fdceb91d4f129efb68.1646122398.git.michal.simek@xilinx.com
Michal Simek [Tue, 1 Mar 2022 08:10:59 +0000 (09:10 +0100)]
power: zynqmp: Use zynqmp_pmufw_node() from firmware
Remove private xpm_configobject[] and use zynqmp_pmufw_node() which
provides the same functionality.
Also add debug messages for easier debugging.
Fixes: e0283cbdfd49 ("power: zynqmp: Add power domain driver for ZynqMP")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Link: https://lore.kernel.org/r/bddf11459b9b9e849fac9a50db2f1a5fdfae4119.1646122254.git.michal.simek@xilinx.com
T Karthik Reddy [Wed, 23 Feb 2022 15:21:30 +0000 (16:21 +0100)]
gpio: slg7xl45106: Add support for slg7xl45106 i2c gpo expander
slg7xl45106 is i2c based 8-bit gpo expander, gpo pins are set and get by
writing and reading corresponding gpo bit value into its data register.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/839f475cc75c97ffb3496a4caa93de2faabdbca2.1645629688.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:13:32 +0000 (15:13 +0100)]
mmc: zynq_sdhci: Enable card detect workaround for ZynqMP
Card detect state stable issue is observed on few ZynqMP boards(SOM),
so enable the workaround 'commit
b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' for ZynqMP platforms also.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0bf6154c79f24227d786efc5e2c1f506185b2bce.1645625609.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:13:31 +0000 (15:13 +0100)]
mmc: zynq_sdhci: Change granularity of timeout to 1us
The timeout used in 'commit
b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' workaround is 1000ms at a
granularity of 1msec. Change it to 1usec, to not waste time incase the
cd is stable.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f008d2bcf864702a01564789f14f9cdecb8acd45.1645625609.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:13:30 +0000 (15:13 +0100)]
mmc: zynq_sdhci: Fix timeout issue
In the workaround added with 'commit
b6f44082d5cd ("mmc: zynq_sdhci: Wait
till sd card detect state is stable")' the timeout variable has post
decrement. Whenever timeout happens, this post decrement is making
timeout=0xffffffff, so timeout error print and return statement are
never reached. Fix it by decrementing it inside the while loop.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61fc1160ada0dd622cd29e381a74af7bf3d9a200.1645625609.git.michal.simek@xilinx.com
Michael Walle [Wed, 23 Feb 2022 14:10:34 +0000 (15:10 +0100)]
ARM: dts: zynq: add NAND flash controller node
Recently, a driver for the ARM Primecell PL35x static memory controller
(including NAND controller) was added in linux. Add the corresponding
device tree node.
Also update cfi-flash registers and location in DT.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210616155437.27378-3-michael@walle.cc
Link: https://lore.kernel.org/r/ee81d3846a1ce93f240d61537d404796e5599c1c.1645625433.git.michal.simek@xilinx.com
Michal Simek [Wed, 23 Feb 2022 14:10:33 +0000 (15:10 +0100)]
mtd: nand: Update driver to match new DT binding
New binding changed node name from flash@
e1000000 to nand-controller@0,0
which should be reflected in the driver. Both names are supported for
backward compatibility.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/61f6edd965e0c0b179184823d5283c6c61a1eb35.1645625433.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:02:51 +0000 (15:02 +0100)]
dm: pinctrl: Use explicit values for enums
Based on discussion at
https://lore.kernel.org/r/
20200318125003.GA2727094@kroah.com we got
recommendation to use explicit values for all enums.
So, add explicit values to all pinctrl related enums for readability.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/dcdb20e7252ea7465e9f984d815e9624c30e9558.1645624969.git.michal.simek@xilinx.com
T Karthik Reddy [Wed, 23 Feb 2022 14:01:37 +0000 (15:01 +0100)]
Revert "board: zynqmp: Fix for wrong AMS setting by ROM"
This reverts commit
dfbe492edef421de09617dc26805fc428440924e.
Analog bus control register should be programmed in SPL only. This commit
3414712ba8a ("arm64: zynqmp: Writing correct value to ANALOG_BUS") is
programming the same. So revert this commit.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/215bc936e36f88d2e7c4422ec68cad6d40cb8f68.1645624892.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:00:59 +0000 (15:00 +0100)]
fru: ops: Add support to read mac addresses from multirecord
Add support to read MAC addresses from mac address multirecord.
Check if multi record is found, then jump to mac address multirecord by
comparing the record type field. If it matches mac address
multirecord(0xD2), then copy mac addresses.
Copy these read MAC address in xilinx_read_eeprom_fru so that they are
updated to eth*addr in board_late_init_xilinx().
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:00:58 +0000 (15:00 +0100)]
xilinx: common: Optimise updating ethaddr from eeprom
In board_late_init_xilinx() eth*addr are updated from the values read from
eeprom. Ideally the MAC addresses are updated sequencially. So if any
MAC address is invalid, it means there are no further valid values.
So optimise this logic by replacing continue with break.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:00:57 +0000 (15:00 +0100)]
fru: ops: Return error from checksum if data is all zero's
fru_checksum function is simply adding all the bytes and returning the
sum. If the data passed to this function is all zero's then it will
return 0, and the functions calling this api will assume that checksum
is correct. Ideally this is not good. Fix this by returning error if all
the data is 0's.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/ac0366fe55c60a818a3f9ed33d96826c817d5520.1645624855.git.michal.simek@xilinx.com
Ashok Reddy Soma [Wed, 23 Feb 2022 14:00:56 +0000 (15:00 +0100)]
fru: ops: Clear fru table before storing data
Fill fru table with 0's before using it, to avoid junk data.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e5f15caf9c2102316e39f300d7c9c1ecb6be8439.1645624855.git.michal.simek@xilinx.com
Tom Rini [Sun, 6 Mar 2022 01:46:55 +0000 (20:46 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi
- Fix ARMv5/F1C100 FEL booting
- Fix F1C100 reset
- Introduce proper F1C100 boot method detection
- Enable SPI booting for F1C100
Boot tested from FEL, SPI, SD card and eMMC (where applicable) on
Pine64-LTS, Pine-H64, BananaPi M1, OrangePi Zero, LicheePi Nano(F1C100).
Tom Rini [Sat, 5 Mar 2022 16:34:31 +0000 (11:34 -0500)]
Merge branch '2022-03-04-assorted-minor-fixes'
- mailmap file updates, OpenSSL code cleanup, assorted TI platform
fixes, typo fix.
Yann Droneaud [Tue, 1 Mar 2022 15:12:34 +0000 (16:12 +0100)]
lib: rsa: use actual OpenSSL 1.1.0 EVP MD API
Since OpenSSL 1.1.0, EVP_MD_CTX_create() is EVP_MD_CTX_new()
EVP_MD_CTX_destroy() is EVP_MD_CTX_free()
EVP_MD_CTX_init() is EVP_MD_CTX_reset()
As there's no need to reset a newly created EVP_MD_CTX, moreover
EVP_DigestSignInit() does the reset, thus call to EVP_MD_CTX_init()
can be dropped.
As there's no need to reset an EVP_MD_CTX before it's destroyed,
as it will be reset by EVP_MD_CTX_free(), call to EVP_MD_CTX_reset()
is not needed and can be dropped.
Signed-off-by: Yann Droneaud <ydroneaud@opteya.com>
Michal Simek [Tue, 1 Mar 2022 11:43:32 +0000 (12:43 +0100)]
.mailmap: Record all address for main U-Boot contributor
Based on looking at top contributors it was seen that top statistics from
top contributors don't include all contributions from different email
addresses. That's why I checked all top contributors are checked it.
git shortlog -n $START..$END -e -s
The patch is adding mapping for Bin Meng, Marek Vasut, Masahiro Yamada,
Michal Simek, Tom Rini, Wolfgang Denk.
And also use mapping for Stefan Roese and Wolfgang Denk to be properly
counted.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Heinrich Schuchardt [Tue, 1 Mar 2022 07:53:56 +0000 (08:53 +0100)]
mkimage: error handling for FIT image
If parameter -F is given but FIT support is missing, a NULL pointer might
dereferenced (Coverity CID 350249).
If incorrect parameters are given, provide a message and show usage.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sébastien Szymanski [Fri, 25 Feb 2022 13:48:54 +0000 (14:48 +0100)]
cmd: pwm: fix typo 'eisable' -> 'disable'
Fixed misspelled 'disable' in help text.
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Jan Kiszka [Wed, 16 Feb 2022 08:06:49 +0000 (09:06 +0100)]
arm: dts: iot2050: Add cfg register space for ringacc and udmap
Recent unrelated fixes (
9876ae7db6da) revealed that we were missing bits
from
2af181b53e28 in the IOT2050 dt. Add them, but only for main U-Boot.
SPL loads from QSPI only, thus cannot use DMA.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Aswath Govindraju [Wed, 16 Feb 2022 05:57:24 +0000 (11:27 +0530)]
configs: j721e_*_evm_a72_defconfig: Enable config for setting mmc speed mode
Enable config for setting mmc speed mode from U-Boot command line.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Christian Gmeiner [Tue, 15 Feb 2022 06:47:55 +0000 (07:47 +0100)]
arm: mach-k3: am6_init: Use CONFIG_TI_I2C_BOARD_DETECT
We only want to call do_board_detect() if CONFIG_TI_I2C_BOARD_DETECT
is set. Same as done for am64.
This makes it possible to add a custom am65 based board design to
U-Boot that does not use this board detection mechanism.
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Romain Naour [Thu, 10 Feb 2022 22:13:36 +0000 (23:13 +0100)]
configs: ti: use standard configuration nodes naming
Currently, any u-boot bootloader for ti armv7 platforms using
DEFAULT_FIT_TI_ARGS to boot with a fitimage (boot_fit = 1)
doesn't boot when built with Yocto Poky (openembedded-core).
## Loading kernel from FIT Image at
90000000 ...
Could not find configuration node
ERROR: can't get kernel image!
Arago forked the kernel-fitimage class [1] and altered the
configuration nodes naming while adding the OPTEE support by
using FITIMAGE_CONF_BY_NAME by default [2].
The "upstream" kernel-fitimage class from openembedded-core still
add the "conf-" prefix for each configuration nodes [3].
The ITS file format (from doc/uImage.FIT/source_file_format.txt)
is not really accurate with the expected naming of these nodes.
But in practice the "conf-" prefix is widely used.
When the FIT image support has been added for ti armv7 platforms
the naming from Arago has been used [3]. Fix this issue by adding
the prefix expected by the ITS file generated by kernel-fitimage
class from openembedded-core.
[1] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=
719ab1b2098bcdc59c249e3529fa82cb1b9130e6
[2] http://arago-project.org/git/meta-arago.git?p=meta-arago.git;a=commitdiff;h=
f23f2876a0cda89241d031bb7ba0b4256ed90035
[3] https://git.openembedded.org/openembedded-core/tree/meta/classes/kernel-fitimage.bbclass?h=yocto-3.1.13#n290
[3]
1e93cc8473e4fe018aececc8ed3bf8fc2b3ff561
Signed-off-by: Romain Naour <romain.naour@smile.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Denys Dmytriyenko <denys@konsulko.com>
Tom Rini [Fri, 4 Mar 2022 13:27:32 +0000 (08:27 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell
- pci_mvebu: Minor cleanup (Pali)
- mvebu: turris_omnia: Enable ext4 write support (Marek)
- a37xx: Misc fixes in PCI and pinctrl (Pali & Marek)
- a38x/rtc: Fix null pointer access (Francios)
- mvebu: x530: clearfog: Fix ODT configuration (Chris)
- kwboot: Fix boot and terminal mode (Pali)
Pali Rohár [Wed, 2 Mar 2022 10:49:27 +0000 (11:49 +0100)]
tools: kwboot: Update references with public links
Public documents about BootROM of some Marvell SoCs are available in the
public Web Archive. Put this information into source code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:26 +0000 (11:49 +0100)]
tools: kwboot: Update doc about Avanta
Testes proved that current kwboot version supports also Avanta SoCs.
It looks like that Avanta SoCs are using same kwbimage format as Armada.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:25 +0000 (11:49 +0100)]
tools: kwboot: Update manpage
Document -D, -b, -d, -q and -s options.
Add common examples how to use kwboot.
Add information about Armada 38x BootROM bug for debug console mode and how
to workaround it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:24 +0000 (11:49 +0100)]
tools: kwboot: Update usage
Add all supported Armada SoCs and document -b and -d options in usage.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:23 +0000 (11:49 +0100)]
tools: kwboot: Add support for backspace key in mini terminal
Marvell BootROM recognize only '\b' byte as backspace. Use terminfo
for retrieving current backspace sequence and replace any occurrence of
backspace sequence by the '\b' byte.
Reading terminfo database is possible via tigetstr() function from system
library libtinfo.so.*. So link kwboot with -ltinfo.
Normally terminfo functions are in <term.h> system header file. But this
header file conflicts with U-Boot "termios_linux.h" header file. So declare
terminfo functions manually.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:22 +0000 (11:49 +0100)]
tools: kwboot: Fix sending and processing debug message pattern (-d option)
-d option is currently broken. In most cases BootROM does not detect this
message pattern. For sending debug message pattern it is needed to do same
steps as for boot message pattern.
Implement sending debug message pattern via same separate thread like it is
for boot message pattern.
Checking if BootROM entered into UART debug mode is different than
detecting UART boot mode. When in boot mode, BootROM sends xmodem NAK
bytes. When in debug mode, BootROM activates console echo and reply back
every written byte (extept \r\n which is interpreted as executing command
and \b which is interpreting as removing the last sent byte).
So in kwboot, check that BootROM send back at least 4 debug message
patterns as a echo reply for debug message patterns which kwboot is sending
in the loop.
Then there is another observation, if host writes too many bytes (as
command) then BootROM command line buffer may overflow after trying to
execute such long command. To workaround this overflow, it is enough to
remove bytes from the input line buffer by sending 3 \b bytes for every
sent character. So do it.
With this change, it is possbile to enter into the UART debug mode with
kwboot -d option.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:21 +0000 (11:49 +0100)]
tools: kwboot: Use separate thread for sending boot message pattern
After BootROM successfully detects boot message pattern on UART it waits
until host stop sending data on UART. For example Armada 385 BootROM
requires that host does not send anything on UART at least 24 ms. If host
is still sending something then BootROM waits (possibly infinitely).
BootROM successfully detects boot message pattern if it receives it in
small period of time after power on.
So to ensure that host put BootROM into UART boot mode, host must send
continuous stream of boot message pattern with a small gap (for A385 at
least 24 ms) after series of pattern. But this gap cannot be too often or
too long to ensure that it does not cover whole BootROM time window when it
is detecting for boot message pattern.
Therefore it is needed to do following steps in cycle without any delay:
1. send series of boot message pattern over UART
2. wait until kernel transmit all data
3. sleep small period of time
At the same time, host needs to monitor input queue, data received on the
UART and checking if it contains NAK byte by which BootROM informs that
xmodem transfer is ready.
But it is not possible to wait until kernel transmit all data on UART and
at the same time in the one process to also wait for input data. This is
limitation of POSIX tty API and also by linux kernel that it does not
provide asynchronous function for waiting until all data are transmitted.
There is only synchronous variant tcdrain().
So to correctly implement this handshake on systems with linux kernel, it
is needed to use tcdrain() in separate thread.
Implement sending of boot message pattern in one thread and reading of
reply in the main thread. Use pthread library for threads.
This change makes UART booting on Armada 385 more reliable. It is possible
to start kwboot and power on board after minute and kwboot correctly put
board into UART boot mode.
Old implementation without separate thread has an issue that it read just
one byte from UART input queue and then it send 128 message pattern to the
output queue. If some noise was on UART then kwboot was not able to read
BootROM response as its input queue was just overflowed and kwboot was
sending more data than receiving.
This change basically fixed above issue too.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:20 +0000 (11:49 +0100)]
tools: kwboot: Cleanup bootmsg and debugmsg variables
Function kwboot_debugmsg() is always called with kwboot_msg_debug as msg
and function kwboot_bootmsg() with kwboot_msg_debug as msg. Function
kwboot_bootmsg() is never called with NULL msg.
Simplify, cleanup and remove dead code.
No functional change.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:19 +0000 (11:49 +0100)]
tools: kwboot: Remove msg_req_delay
Variable msg_req_delay is set but never used. So completely remove it.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 2 Mar 2022 10:49:18 +0000 (11:49 +0100)]
tools: kwboot: Check for return value of kwboot_tty_send() and tcflush()
Failure of kwboot_tty_send() and tcflush() functions is fatal, it does not
make sense to continue. So return error back to the caller like in other
places where are called these functions.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Chris Packham [Tue, 1 Mar 2022 00:53:23 +0000 (13:53 +1300)]
ARM: mvebu: x530: clearfog: Add ODT configuration
Commit
369e532691e0 ("ddr: marvell: a38x: allow board specific ODT
configuration") added the odt_config member to struct
mv_ddr_topology_map ahead of the clk_enable and ck_delay members. This
means that any boards that configured either of clk_enable or ck_delay
needed to have their board topology updated. This affects the x530 and
clearfog boards. Other A38x boards don't touch any of the trailing
members of mv_ddr_topology_map so don't need updating.
Fixes: 369e532691e0 ("ddr: marvell: a38x: allow board specific ODT configuration")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Mon, 28 Feb 2022 14:59:37 +0000 (15:59 +0100)]
arm64: a37xx: pinctrl: Fix PWM pins indexes
Commit
5534fb4f4833 ("arm64: a37xx: pinctrl: Correct PWM pins
definitions") introduced bogus definitions os PWM pins: all 4 pins have
index 11, instead of having indexes 11, 12, 13, 14.
Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Francois Berder [Mon, 28 Feb 2022 09:31:45 +0000 (10:31 +0100)]
drivers: rtc: fix null pointer access in armada38x_rtc_reset
Replace null pointer by pointer to device registers when calling
armada38x_rtc_write.
Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 23 Feb 2022 12:52:32 +0000 (13:52 +0100)]
arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function again
The a3700_fdt_fix_pcie_regions() function still computes nonsense.
It computes the fixup offset from the PCI address taken from the first
row of the "ranges" array, which means that:
- PCI address must equal CPU address (otherwise the computed fix offset
will be wrong),
- the first row must contain the lowest address.
This is the case for the default device-tree, which is why we didn't
notice it.
It also adds the fixup offset to all PCI and CPU addresses, which is
wrong.
Instead:
1) The fixup offset must be computed from the CPU address, not PCI
address.
2) The fixup offset must be computed from the row containing the lowest
CPU address, which is not necessarily contained in the first row.
3) The PCI address - the address to which the PCIe controller remaps the
address space as seen from the point of view of the PCIe device -
must be fixed by the fix offset in the same way as the CPU address
only in the special case when the CPU adn PCI addresses are the same.
Same addresses means that remapping is disabled, and thus if we
change the CPU address, we need also to change the PCI address so
that the remapping is still disabled afterwards.
Consider an example:
The ranges entries contain:
PCI address CPU address
70000000 EA000000
E9000000 E9000000
EB000000 EB000000
By default CPU PCIe window is at:
E8000000 -
F0000000
Consider the case when TF-A moves it to:
F2000000 -
FA000000
Until now the function would take the PCI address of the first entry:
70000000, and the new base,
F2000000, to compute the fix offset:
F2000000 -
70000000 =
82000000, and then add
8200000 to all addresses,
resulting in
PCI address CPU address
F2000000 6C000000
6B000000 6B000000
6D000000 6D000000
which is complete nonsense - none of the CPU addresses is in the
requested window.
Now it will take the lowest CPU address, which is in second row,
E9000000, and compute the fix offset
F2000000 -
E9000000 =
09000000,
and then add it to all CPU addresses and those PCI addresses which
equal to their corresponding CPU addresses, resulting in
PCI address CPU address
70000000 F3000000
F2000000 F2000000
F4000000 F4000000
where all of the CPU addresses are in the needed window.
Fixes: 4a82fca8e330 ("arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() function")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 18 Feb 2022 16:46:25 +0000 (17:46 +0100)]
arm: mvebu: turris_omnia: Enable ext4 write support in defconfig
Enable ext4 write support in Turris Omnia's defconfig. Some users find
it useful.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 18 Feb 2022 11:25:23 +0000 (12:25 +0100)]
pci: pci_mvebu: Cleanup macro names
Use "MVPCIE_" prefix instead of generic "PCIE_" prefix for pci_mvebu.c
specific macros. Define offset macros for Root Port registers and use
standard register macros from pci.h when accessing Root Port registers.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 18 Feb 2022 11:25:22 +0000 (12:25 +0100)]
pci: pci_mvebu: Remove unused SELECT and lane_mask
Macro SELECT() is unused and struct mvebu_pcie field lane_mask is unused
too. Remove them.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Fri, 18 Feb 2022 11:24:13 +0000 (12:24 +0100)]
tools: kwboot: Fix quitting terminal
Sometimes kwboot after quitting terminal prints error message:
terminal: Bad address
This is caused by trying to call write() syscall with count of (size_t)-1
bytes.
When quit sequence is split into more read() calls then number of input
bytes (nin) at the end of cycle can underflow and be negative. Fix it.
Fixes: de7514046ea5 ("tools: kwboot: Fix detection of quit esc sequence")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Thu, 3 Mar 2022 13:24:37 +0000 (08:24 -0500)]
Merge tag 'u-boot-at91-fixes-2022.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91
First set of u-boot-atmel fixes for the 2022.04 cycle:
This fixes set includes only a single fix for the Ethernet on sama7g5ek
board which is broken at the moment.
Tom Rini [Thu, 3 Mar 2022 13:24:13 +0000 (08:24 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Update and fixes for sl28, lx2, pblimage generation for some powerpc
products
Andre Przywara [Wed, 2 Mar 2022 01:30:55 +0000 (01:30 +0000)]
sunxi: f1c100s: Drop SYSRESET to enable reset functionality
The F1C100s DT contains the wrong compatible string for the watchdog,
which breaks reset functionality.
Updating the DT goes via the Linux tree, but to allow reset
functionality meanwhile (useful for development!), disable SYSRESET for
now, to let the old-fashioned watchdog driver kick in and provide the
reset_cpu() implementation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 1 Mar 2022 12:21:58 +0000 (12:21 +0000)]
sunxi: f1c100s: Fix FEL registers restore
Commit
88998f777531 ("arm: arm926ej-s: Add sunxi code") introduced
the ARM926 version of the code to save and restore some FEL state, to
be able to return to the BROM FEL code after the SPL has run.
However during review a change was made, that happened to mess up the
register restore part, so SCTLR and CPSR ended up with the wrong values,
breaking return to FEL.
Use the same offset that we actually save those registers to, to make
FEL booting actually work on the Lichee Pi Nano.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jesse Taube [Sat, 12 Feb 2022 00:32:35 +0000 (19:32 -0500)]
mach-sunxi: Enable SPI boot for SUNIV and licheepi nano
Enable SPI boot in SPL on SUNIV architecture and use
it in the licheepi nano that uses the F1C100s.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jesse Taube [Sat, 12 Feb 2022 00:32:34 +0000 (19:32 -0500)]
mach-sunxi: Add SPL SPI boot for SUNIV
The SUNIV SoCs come with a sun6i-style SPI controller at the base address
of sun4i SPI controller. The module clock of the SPI controller is
missing which leaves us running directly from the AHB clock, which is
set to 200MHz.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[Icenowy: Original implementation]
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
[Jesse: adaptation to Upstream U-Boot]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jesse Taube [Sat, 12 Feb 2022 00:32:33 +0000 (19:32 -0500)]
mach-sunxi: Add boot device detection for SUNIV/F1C100s
In contrast to other Allwinner SoCs the F1C100s BROM does not store a
boot source indicator in the eGON header in SRAM. This leaves the SPL
guessing where we were exactly booted from, and for instance trying
the SD card first, even though we booted from SPI flash.
By inspecting the BROM code and by experimentation, Samuel found that the
top of the BROM stack contains unique pointers for each of the boot
sources, which we can use as a boot source indicator.
This patch removes the existing board_boot_order bodge and replace it
with a proper boot source indication function.
The only caveat is that this only works in the SPL, as the SPL header
gets overwritten with the exception vectors, once U-Boot proper takes
over. Always return MMC0 as the boot source, when called from U-Boot
proper, as a placeholder for now, until we find another way.
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Suggested-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tom Rini [Tue, 1 Mar 2022 12:48:39 +0000 (07:48 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb
Tim Harvey [Mon, 28 Feb 2022 22:53:21 +0000 (14:53 -0800)]
phy: nop-phy: Fix phy reset if no reset-gpio defined
Ensure there is a valid reset-gpio defined before using it.
Fixes: f9852acdce02 ("phy: nop-phy: Fix enabling reset")
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tom Rini [Mon, 28 Feb 2022 23:02:33 +0000 (18:02 -0500)]
Prepare v2022.04-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 28 Feb 2022 20:45:52 +0000 (15:45 -0500)]
Merge branch '2022-02-28-bugfixes'
- Assorted bugfixes
Linus Walleij [Sun, 20 Feb 2022 22:47:01 +0000 (23:47 +0100)]
board: stemmy: Detect board variants and patch DTB
This patch scans the cmdline from the Samsung SBL (second stage
bootloader) and stores the parameters board_id=N and lcdtype=N
in order to augment the DTB for different board and LCD types.
We then add a custom ft_board_setup() callback that will inspect
the DTB and patch it using the stored LCD type. At this point
we know which product we are dealing with, so using the passed
board_id we can also print the board variant for diagnostics.
We patch the Codina, Skomer and Kyle DTBs to use the right
LCD type as passed in lcdtype from the SBL.
This also creates an infrastructure for handling any other
Samsung U8500 board variants that may need a slightly augmented
DTB.
Cc: Markuss Broks <markuss.broks@gmail.com>
Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Janne Grunau [Sat, 19 Feb 2022 13:05:19 +0000 (14:05 +0100)]
arm: apple: Switch to fully dynamic mem layout
Support for Apple M1 Pro and Max will allow using a single binary for
all M1 SoCs. The M1 Pro/Max have a different memory layout. The RAM
start address is 0x100_0000_0000 instead of 0x8_0000_0000.
Replace the hardcoded memory layout with dynamic initialized
environment variables in board_late_init().
Tested on Mac Mini (2020) and Macbook Pro 14-inch (2021).
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Felix Brack [Mon, 21 Feb 2022 13:26:05 +0000 (14:26 +0100)]
arm: pdu001: Setup pinmux for console UART as early as possible
To make sure we get a working console as soon as possible in the SPL the
UART pins require to be configured earlier. This is especially
true for the pins of UART3, since the PDU001 board uses this UART for
the console by default.
Signed-off-by: Felix Brack <fb@ltec.ch>
Felix Brack [Tue, 15 Feb 2022 14:27:23 +0000 (15:27 +0100)]
arm: pdu001: Fix early debugging UART
The changes from commit
0dba45864b2a ("arm: Init the debug UART")
prevent the early debug UART from being initialized correctly.
To fix this we not just configure the pin multiplexer but add setting up
early clocks.
Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Sun, 13 Feb 2022 00:09:46 +0000 (01:09 +0100)]
tools: mkimage/dumpimage: Allow to use -l with -T
Currently -l option for mkimage and dumpimage ignores option -T and always
tries to autodetect image type.
With this change it is possible to tell mkimage and dumpimage to parse
image file as specific type (and not random autodetected type). This allows
to use mkimage -l or dumpimage -l as tool for validating image.
params.type for -l option is now by default initialized to zero
(IH_TYPE_INVALID) instead of IH_TYPE_KERNEL. imagetool_get_type() for
IH_TYPE_INVALID returns NULL, which is assigned to tparams. mkimage and
dumpimage code is extended to handle tparams with NULL for -l option. And
imagetool_verify_print_header() is extended to do validation via tparams if
is not NULL.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Thu, 17 Feb 2022 03:51:36 +0000 (11:51 +0800)]
tools: pblimage: fix image header verification function
The Layerscape platforms have different RCW header value from FSL
PowerPC platforms, the current image header verification callback
is only working on PowerPC, it will fail on Layerscape, this patch
is to fix this issue.
This is a historical problem and exposed by the following patch:
http://patchwork.ozlabs.org/project/uboot/patch/
20220114173443.9877-1-pali@kernel.org
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Daniel Klauer [Wed, 9 Feb 2022 14:53:41 +0000 (15:53 +0100)]
lx2160a: Fix distroboot device list for configs without USB/SCSI/etc
The BOOT_TARGET_DEVICES list for distro_bootcmd was hard-coded to assume
that all boot devices are available/enabled in the configuration,
thus ignoring the actual config settings. The config_distro_bootcmd.h
header file specifically has compile-time checks to detect such problems.
To allow disabling USB, SCSI, etc. in custom lx2160a board configs,
make it depend on the config settings and use only the enabled features.
Signed-off-by: Daniel Klauer <daniel.klauer@gin.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Fri, 25 Feb 2022 12:51:56 +0000 (18:21 +0530)]
board: sl28: use fit image generator
Simplify the binman config and fdt nodes by using the "@..-SEQ"
substitutions and CONFIG_OF_LIST.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Fri, 25 Feb 2022 12:48:40 +0000 (18:18 +0530)]
board: sl28: disable random MAC address generation
Nowadays, u-boot (when CONFIG_NET_RANDOM_ETHADDR is set) will set
enetaddr to a random value if not set and then pass the randomly
generated MAC address to linux.
This is bad for the following reasons:
(1) it makes it impossible for linux to detect this error
(2) linux won't trigger any fallback mechanism for the case where
it didn't find any valid MAC address
(3) a saveenv will store this randomly generated MAC address in the
environment
Probably, the user will also be unaware that something is wrong. He will
just get different MAC addresses on each reboot, asking himself why this
is the case.
As this board usually have a serial port, the user can just fix this by
setting the MAC address manually in the environment. Also disable the
netconsole just in case, because it cannot be guaranteed that it will
work in any case. After all, this was just a convenience option, because
the bootloader - right now - doesn't have the ability to read the MAC
address, which is stored in the OTP. But it is far more important to
have a clear view of whats wrong with a board and that means we can no
longer use this Kconfig option.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:50 +0000 (23:45 +0100)]
board: sl28: remove "Useful I2C tricks" section from docs
They are no longer needed, because we now have proper driver support for
the sl28cpld management controller.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:49 +0000 (23:45 +0100)]
board: sl28: disable recovery watchdog
This board has an internal watchdog which supervises the board startup.
Although, the initial state of the watchdog is configurable, it is
enabled by default. In board_late_init(), which means almost everything
worked as expected, disable the watchdog.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:48 +0000 (23:45 +0100)]
board: sl28: enable SoC watchdog support
The SoC provides two additional watchdogs integrated in the SoC. Enable
support for these.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:47 +0000 (23:45 +0100)]
board: sl28: enable sl28cpld support
Enable the GPIO and watchdog driver. Don't start the watchdog
automatically, though.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:46 +0000 (23:45 +0100)]
board: sl28: print CPLD version on bootup
Most of the time it is very useful to have the version of the board
management controller. Now that we have a driver, print it during
startup.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:45 +0000 (23:45 +0100)]
board: sl28: fix DRAM pretty print
The current console output is:
DRAM: 4 GiB
DDR 4 GiB (DDR3, 32-bit, CL=11, ECC on)
The size is printed twice and we can save one line of console output if
we join both lines. The new output is as follows:
DRAM: 4 GiB (DDR3, 32-bit, CL=11, ECC on)
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Fri, 25 Feb 2022 12:40:24 +0000 (18:10 +0530)]
gpio: add sl28cpld driver
The gpio block is part of the sl28cpld sl28cpld management controller.
There are three different flavors: the usual input and output where the
direction is configurable, but also input only and output only variants.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Mon, 15 Nov 2021 22:45:43 +0000 (23:45 +0100)]
watchdog: add sl28cpld watchdog driver
The watchdog timer is part of the sl28cpld management controller. The
watchdog timer usually supervises the bootloader boot-up and if it bites
the failsafe bootloader will be activated. Apart from that it supports
the usual board level reset and one SMARC speciality: driving the
WDT_TIMEOUT# signal.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Fri, 25 Feb 2022 12:36:24 +0000 (18:06 +0530)]
misc: add sl28cpld base driver
Add a multi-function device driver which will probe its children and
provides methods to access the device.
Signed-off-by: Michael Walle <michael@walle.cc>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Tom Rini [Sat, 26 Feb 2022 15:21:39 +0000 (10:21 -0500)]
Merge tag 'efi-2022-04-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-04-rc3
Documentation:
* add man-page for fatload
* add SMBIOS table page
UEFI:
* partial fix for UEFI secure boot with intermediate certs
* disable watchdog when returning to command line
* reset system after capsule update
Tom Rini [Sat, 26 Feb 2022 15:21:13 +0000 (10:21 -0500)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh
- rzg2_beacon updates
Masahisa Kojima [Tue, 22 Feb 2022 00:58:30 +0000 (09:58 +0900)]
efi_loader: update the timing of enabling and disabling EFI watchdog
UEFI specification requires that 5 minutes watchdog timer is
armed before the firmware's boot manager invokes an EFI boot option.
This watchdog timer is updated as follows, according to the
UEFI specification.
1) The EFI Image may reset or disable the watchdog timer as needed.
2) If control is returned to the firmware's boot manager,
the watchdog timer must be disabled.
3) On successful completion of EFI_BOOT_SERVICES.ExitBootServices()
the watchdog timer is disabled.
1) is up to the EFI image, and 3) is already implemented in U-Boot.
This patch implements 2), the watchdog is disabled when control is
returned to U-Boot.
In addition, current implementation arms the EFI watchdog at only
the first "bootefi" invocation. The EFI watchdog must be armed
in every EFI boot option invocation.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Masami Hiramatsu [Wed, 16 Feb 2022 06:16:12 +0000 (15:16 +0900)]
efi_loader: test/py: Reset system after capsule update on disk
Add a cold reset soon after processing capsule update on disk.
This is required in UEFI specification 2.9 Section 8.5.5
"Delivery of Capsules via file on Mass Storage device" as;
In all cases that a capsule is identified for processing the system is
restarted after capsule processing is completed.
This also reports the result of each capsule update so that the user can
notice that the capsule update has been succeeded or not from console log.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Masami Hiramatsu [Wed, 16 Feb 2022 06:16:02 +0000 (15:16 +0900)]
test/py: Handle expected reboot while booting sandbox
Add expected_reset optional argument to ConsoleBase::ensure_spawned(),
ConsoleBase::restart_uboot() and ConsoleSandbox::restart_uboot_with_flags()
so that it can handle a reset while the 1st boot process after main
boot logo before prompt correctly.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Masami Hiramatsu [Wed, 16 Feb 2022 06:15:52 +0000 (15:15 +0900)]
test/py: Handle expected reset by command
Add wait_for_reboot optional argument to ConsoleBase::run_command()
so that it can handle an expected reset by command execution.
This is useful if a command will reset the sandbox while testing
such commands, e.g. run_command("reset", wait_for_reboot = True)
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Masami Hiramatsu [Wed, 16 Feb 2022 06:15:42 +0000 (15:15 +0900)]
efi_loader: use efi_update_capsule_firmware() for capsule on disk
Since the efi_update_capsule() represents the UpdateCapsule() runtime
service, it has to handle the capsule flags and update ESRT. However
the capsule-on-disk doesn't need to care about such things.
Thus, the capsule-on-disk should use the efi_capsule_update_firmware()
directly instead of calling efi_update_capsule().
This means the roles of the efi_update_capsule() and capsule-on-disk
are different. We have to keep the efi_update_capsule() for providing
runtime service API at boot time.
Suggested-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>