From b275c9aba6d1628211287f80297048128acec964 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Wed, 13 Feb 2019 21:50:25 +0100
Subject: [PATCH] ARM: cache: Fix incorrect bitwise operation

The loop implemented in the code is supposed to check whether the
PL310 operation register has any bit from the mask set. Currently,
the code checks whether the PL310 operation register has any bit
set AND whether the mask is non-zero, which is incorrect. Fix the
conditional.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Tom Rini <trini@konsulko.com>
Fixes: 93bc21930a1b ("armv7: add PL310 support to u-boot")
---
 arch/arm/lib/cache-pl310.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/cache-pl310.c b/arch/arm/lib/cache-pl310.c
index 1296ba6efd..bbaaaa4157 100644
--- a/arch/arm/lib/cache-pl310.c
+++ b/arch/arm/lib/cache-pl310.c
@@ -33,7 +33,7 @@ static void pl310_background_op_all_ways(u32 *op_reg)
 	/* Invalidate all ways */
 	writel(way_mask, op_reg);
 	/* Wait for all ways to be invalidated */
-	while (readl(op_reg) && way_mask)
+	while (readl(op_reg) & way_mask)
 		;
 	pl310_cache_sync();
 }
-- 
2.39.5