From 501ba58ae614b2c65e302bfd6ea68f1e2c52ced0 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Wed, 27 May 2020 05:42:13 -0600
Subject: [PATCH] x86: coral: Correct some FSP-S settings

Some settings were modified slightly in the device-tree conversion. Return
these to their original values. This includes some audio settings and a
few others that have changed.

Note that we still rely on the FSP defaults for most values, so there is
no need to specify a value if the FSP default is suitable.

This makes WiFi work again.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
---
 arch/x86/dts/chromebook_coral.dts | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index fe0d4dedd7..965d9f387d 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -599,13 +599,9 @@
 	fsps,emmc-rx-cmd-data-cntl1 = <0x00181717>;
 	fsps,emmc-rx-cmd-data-cntl2 = <0x10008>;
 
-	/* Enable Audio Clock and Power gating */
-	fsps,hd-audio-clk-gate = <1>;
-	fsps,hd-audio-pwr-gate = <1>;
-	fsps,bios-cfg-lock-down = <1>;
-
-	/* Enable lpss s0ix */
-	fsps,lpss-s0ix-enable = <1>;
+	/* Enable WiFi */
+	fsps,pcie-root-port-en = [01 00 00 00 00 00];
+	fsps,pcie-rp-hot-plug = [00 00 00 00 00 00];
 
 	fsps,skip-mp-init = <1>;
 	fsps,spi-eiss = <0>;
-- 
2.39.5