From 144d0574d5f3652008ef400e86cc66db5ef88736 Mon Sep 17 00:00:00 2001 From: Jaehoon Chung <jh80.chung@samsung.com> Date: Tue, 16 Feb 2021 10:16:56 +0900 Subject: [PATCH] configs: enable CONFIG_MMC_PWRSEQ configuration Enable CONFIG_MMC_PWRSEQ configuration about boards that is using rockchip_dw_mmc driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> --- configs/chromebit_mickey_defconfig | 1 + configs/chromebook_bob_defconfig | 1 + configs/chromebook_jerry_defconfig | 1 + configs/chromebook_minnie_defconfig | 1 + configs/chromebook_speedy_defconfig | 1 + 5 files changed, 5 insertions(+) diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index ba1215bca6..c09b63b946 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -63,6 +63,7 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +CONFIG_MMC_PWRSEQ=y # CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index 73635f0d13..a846b6470f 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -55,6 +55,7 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +CONFIG_MMC_PWRSEQ=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index dada557952..692b630174 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -65,6 +65,7 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +CONFIG_MMC_PWRSEQ=y # CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 985ca94770..ae55842e3b 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -65,6 +65,7 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +CONFIG_MMC_PWRSEQ=y # CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index e3d4c30739..4b460ee6a9 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -64,6 +64,7 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_PWRSEQ=y +CONFIG_MMC_PWRSEQ=y # CONFIG_SPL_DM_MMC is not set CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y -- 2.39.5