From 1255f8bc36101400fd16fc4898f9dd9fdccbbc2e Mon Sep 17 00:00:00 2001
From: Wasim Khan <wasim.khan@nxp.com>
Date: Mon, 28 Sep 2020 16:26:14 +0530
Subject: [PATCH] pci: ls_pcie_g4: Add size check for config resource
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
---
drivers/pci/pcie_layerscape_gen4.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c
index 0226bde678..6e71173621 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -455,6 +455,7 @@ static int ls_pcie_g4_probe(struct udevice *dev)
u32 link_ctrl_sta;
u32 val;
int ret;
+ fdt_size_t cfg_size;
pcie->bus = dev;
@@ -488,6 +489,13 @@ static int ls_pcie_g4_probe(struct udevice *dev)
return ret;
}
+ cfg_size = fdt_resource_size(&pcie->cfg_res);
+ if (cfg_size < SZ_4K) {
+ printf("PCIe%d: %s Invalid size(0x%llx) for resource \"config\",expected minimum 0x%x\n",
+ PCIE_SRDS_PRTCL(pcie->idx), dev->name, cfg_size, SZ_4K);
+ return 0;
+ }
+
pcie->cfg = map_physmem(pcie->cfg_res.start,
fdt_resource_size(&pcie->cfg_res),
MAP_NOCACHE);
--
2.39.5