From acb83bb3ec4fd7f52c600244daa5d8caa53a4924 Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@xilinx.com>
Date: Wed, 17 Oct 2018 12:16:12 +0200
Subject: [PATCH] arm: zynq: Setup non zero SPL FIT load address

Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---
 include/configs/zynq-common.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 98411c4e9f..864f3220f3 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -290,6 +290,8 @@
 #define CONFIG_SPL_BSS_START_ADDR	0x100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x100000
 
+#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000
+
 #define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE
 
 #endif /* __CONFIG_ZYNQ_COMMON_H */
-- 
2.39.5