From: Pali Rohár <pali@kernel.org>
Date: Fri, 26 Nov 2021 10:42:44 +0000 (+0100)
Subject: pci: msc01: Use PCI_CONF1_ADDRESS() macro
X-Git-Tag: v2025.01-rc5-pxa1908~1589^2~8
X-Git-Url: http://git.dujemihanovic.xyz/img/html/static/%7B%7B?a=commitdiff_plain;h=f146bd96e448200d05261e92738812ca6e37c372;p=u-boot.git

pci: msc01: Use PCI_CONF1_ADDRESS() macro

PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.

So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
---

diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 2f1b688fc3..8d363d6049 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -34,16 +34,13 @@ static int msc01_config_access(struct msc01_pci_controller *msc01,
 	void *cfgdata = msc01->base + MSC01_PCI_CFGDATA_OFS;
 	unsigned int bus = PCI_BUS(bdf);
 	unsigned int dev = PCI_DEV(bdf);
-	unsigned int devfn = PCI_DEV(bdf) << 3 | PCI_FUNC(bdf);
+	unsigned int func = PCI_FUNC(bdf);
 
 	/* clear abort status */
 	__raw_writel(aborts, intstat);
 
 	/* setup address */
-	__raw_writel((bus << MSC01_PCI_CFGADDR_BNUM_SHF) |
-		     (dev << MSC01_PCI_CFGADDR_DNUM_SHF) |
-		     (devfn << MSC01_PCI_CFGADDR_FNUM_SHF) |
-		     ((where / 4) << MSC01_PCI_CFGADDR_RNUM_SHF),
+	__raw_writel((PCI_CONF1_ADDRESS(bus, dev, func, where) & ~PCI_CONF1_ENABLE),
 		     msc01->base + MSC01_PCI_CFGADDR_OFS);
 
 	/* perform access */
diff --git a/include/msc01.h b/include/msc01.h
index ec18a724eb..2015812349 100644
--- a/include/msc01.h
+++ b/include/msc01.h
@@ -71,15 +71,6 @@
 #define MSC01_PCI_INTSTAT_MA_SHF	7
 #define MSC01_PCI_INTSTAT_MA_MSK	(0x1 << MSC01_PCI_INTSTAT_MA_SHF)
 
-#define MSC01_PCI_CFGADDR_BNUM_SHF	16
-#define MSC01_PCI_CFGADDR_BNUM_MSK	(0xff << MSC01_PCI_CFGADDR_BNUM_SHF)
-#define MSC01_PCI_CFGADDR_DNUM_SHF	11
-#define MSC01_PCI_CFGADDR_DNUM_MSK	(0x1f << MSC01_PCI_CFGADDR_DNUM_SHF)
-#define MSC01_PCI_CFGADDR_FNUM_SHF	8
-#define MSC01_PCI_CFGADDR_FNUM_MSK	(0x3 << MSC01_PCI_CFGADDR_FNUM_SHF)
-#define MSC01_PCI_CFGADDR_RNUM_SHF	2
-#define MSC01_PCI_CFGADDR_RNUM_MSK	(0x3f << MSC01_PCI_CFGADDR_RNUM_SHF)
-
 #define MSC01_PCI_HEAD0_VENDORID_SHF	0
 #define MSC01_PCI_HEAD0_DEVICEID_SHF	16