From: Weijie Gao <weijie.gao@mediatek.com>
Date: Tue, 23 Feb 2021 07:12:44 +0000 (+0800)
Subject: mips: mt7628: fix ddr_type for MT7688KN
X-Git-Tag: v2025.01-rc5-pxa1908~1908^2~6
X-Git-Url: http://git.dujemihanovic.xyz/img/html/static/%7B%7B?a=commitdiff_plain;h=a9961e5acd5f918a4bf145a1f8b8df061fffe9c7;p=u-boot.git

mips: mt7628: fix ddr_type for MT7688KN

The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.

This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---

diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c
index b091f2ecff..4e72459906 100644
--- a/arch/mips/mach-mtmips/mt7628/ddr.c
+++ b/arch/mips/mach-mtmips/mt7628/ddr.c
@@ -140,6 +140,9 @@ void mt7628_ddr_init(void)
 	lspd = readl(sysc + SYSCTL_CLKCFG0_REG) &
 	       (CPU_PLL_FROM_BBP | CPU_PLL_FROM_XTAL);
 
+	if (pkg_type == PKG_ID_KN)
+		ddr_type = DRAM_DDR1;
+
 	mt7628_memc_reset(1);
 	__udelay(200);
 
@@ -152,9 +155,6 @@ void mt7628_ddr_init(void)
 	param.memsize = 0;
 	param.bus_width = 0;
 
-	if (pkg_type == PKG_ID_KN)
-		ddr_type = DRAM_DDR1;
-
 	if (ddr_type == DRAM_DDR1) {
 		if (lspd)
 			param.cfgs = ddr1_cfgs_160mhz;