From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Sun, 30 Jan 2022 14:27:14 +0000 (+0100)
Subject: sunxi: clock: H6/H616: Add resistor calibration
X-Git-Tag: v2025.01-rc5-pxa1908~1477^2~4
X-Git-Url: http://git.dujemihanovic.xyz/img/html/static/%7B%7B?a=commitdiff_plain;h=40a9c200aff1b855f66745a1b9961668739ef6fb;p=u-boot.git

sunxi: clock: H6/H616: Add resistor calibration

BSP boot0 executes resistor calibration before clocks are initialized.
Let's do that.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---

diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index e5846e6381..32119ad165 100644
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -12,9 +12,14 @@ void clock_init_safe(void)
 	struct sunxi_prcm_reg *const prcm =
 		(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
 
-	/* this seems to enable PLLs on H616 */
-	if (IS_ENABLED(CONFIG_MACH_SUN50I_H616))
+	if (IS_ENABLED(CONFIG_MACH_SUN50I_H616)) {
+		/* this seems to enable PLLs on H616 */
 		setbits_le32(&prcm->sys_pwroff_gating, 0x10);
+		setbits_le32(&prcm->res_cal_ctrl, 2);
+	}
+
+	clrbits_le32(&prcm->res_cal_ctrl, 1);
+	setbits_le32(&prcm->res_cal_ctrl, 1);
 
 	clock_set_pll1(408000000);