Igor Prusov [Tue, 14 Nov 2023 11:02:53 +0000 (14:02 +0300)]
xtensa: io.h: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l}() functions to make asm-generic/io.h
aware of them.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:52 +0000 (14:02 +0300)]
powerpc: io.h: Add defines for __raw_{read, write} functions
Add defines for __raw_{read,write}{b,w,l}() functions to make
make asm-generic/io.h aware of them.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:51 +0000 (14:02 +0300)]
nios2: io.h: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l} functions to make asm-generic/io.h
aware of them.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:50 +0000 (14:02 +0300)]
riscv: io.h: Fix signatures of reads/writes functions
Change type of address parameter from int* to volatile void* for
{read,write}s{b,w,l}() functions and add const qualifier for reads. This
is done to keep function signatures in sync with asm-generic/io.h and
other platforms.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:49 +0000 (14:02 +0300)]
riscv: io.h: Add defines for reads/writes functions
Add defines for {read,write}s{b,w,l} functions to make asm-generic/io.h
aware of them.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:48 +0000 (14:02 +0300)]
mips: io.h: Add defines for read/write/in/out functions
Add defines for {read,write}{b,w,l,q}(), {read,write}s{b,w,l,q}() and
{in,out}s{b,w,l,q}() functions to make asm-generic/io.h aware of them.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:47 +0000 (14:02 +0300)]
mips: io.h: Add const to reads functions params
Currently reads{b,w,l}() functions don't have const qualifier for their
address parameter. Since asm-generic/io.h in Linux has const for all
read functions, add it here as well to keep signatures in sync.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:46 +0000 (14:02 +0300)]
x86: Add defines for ins/outs functions
Add defines for {in,out}s{b,w,l}() functions to make sure that
they will be used by asm-generic/io.h
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Igor Prusov [Tue, 14 Nov 2023 11:02:45 +0000 (14:02 +0300)]
sandbox: move asm-generic include to the end of file
Generic version of io.h should be included at the end of
architecture-specific ones to make sure that arch implementations are
used and to avoid redefinitions.
Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Nishanth Menon [Wed, 1 Nov 2023 20:56:03 +0000 (15:56 -0500)]
tree-wide: Replace http:// link with https:// link for ti.com
Replace instances of http://www.ti.com with https://www.ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Alexander Gendin [Wed, 8 Nov 2023 03:05:19 +0000 (03:05 +0000)]
test: cmd: mbr: Remove unreachable code
Fix an issue reported by Coverity scan, and fix code indentation.
Addresses-Coverity-ID: 467404 ("Control flow issues (DEADCODE)")
Signed-off-by: Alexander Gendin <agendin@matrox.com>
AKASHI Takahiro [Tue, 7 Nov 2023 00:05:47 +0000 (09:05 +0900)]
firmware: scmi: correct a validity check against power domain id
A power domain id on sandbox should be in the range from zero to
ARRAY_SIZE(scmi_pwdom) - 1. Correct the validity check logic.
Addresses-Coverity-ID: 467401 ("Out-of-bounds write")
Addresses-Coverity-ID: 467405 ("Out-of-bounds read")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tom Rini [Wed, 8 Nov 2023 19:28:11 +0000 (14:28 -0500)]
scsi: Have scsi_init_dev_desc_priv() use memset
When we do not have CONFIG_BOUNCE_BUFFER enabled, inside of
scsi_init_dev_desc_priv we never set the 'bb' field to false, we only
initialize it to true when CONFIG_BOUNCE_BUFFER is set. Given that we
have a number of other fields here we had been explicitly setting to
zero, change to first calling memset to clear the struct and then
initialize only the fields that need non-zero default values.
Addresses-Coverity-ID: 467407 ("Uninitialized variables (UNINIT)")
Fixes: 81bd22e935dc ("rockchip: block: blk-uclass: add bounce buffer flag to blk_desc")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sam Protsenko [Tue, 7 Nov 2023 20:45:04 +0000 (14:45 -0600)]
MAINTAINERS: Fix Sam Protsenko mail
Sam works for Linaro again. Use his work e-mail address for ANDROID AB
subsystem.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tom Rini [Tue, 7 Nov 2023 15:36:23 +0000 (10:36 -0500)]
Merge tag 'xilinx-for-v2024.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze
Xilinx changes for v2024.01-rc3
xilinx:
- Disable lock in mini spi configurations
zynq:
- DTS syncups
- Kconfig updates
zynqmp:
- DTS syncups
- Kconfig fixups
versal:
- Make 30MHz as default freq for spi
versal net:
- Enable ADMA for mmc
serial:
- Read baudrate from DT
spi:
- Put spi lock under one Kconfig
- Support 64bit addresses in cadance_ospi
- zynqmp_gqspi - change logging support
firmware:
- Handle errors in zynqmp_pm_feature()
include:
- Sync vsc8531 dt binding with kernel
Mattijs Korpershoek [Thu, 5 Oct 2023 13:04:26 +0000 (15:04 +0200)]
MAINTAINERS: fastboot: add Mattijs
Fastboot has been marked as orphaned since 2021.
Since I'm interested in maintaining this, assign myself.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Mattijs Korpershoek [Thu, 5 Oct 2023 13:04:25 +0000 (15:04 +0200)]
MAINTAINERS: usb gadget: add Mattijs
It seems that Lukasz and Marek could get some help in maintaining the
usb gadget drivers.
Assign myself as maintainer.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Michal Simek [Wed, 1 Nov 2023 15:05:16 +0000 (16:05 +0100)]
dt-bindings: Remove VSC8531 specific RGMII delay definitions
Based on Linux upstream discussion value enumeration shouldn't be used.
Instead of it delay in pS should be used that's why remove it from the
header.
Link: https://lore.kernel.org/all/YNsm%2F0dmpBgO8mqr@lunn.ch/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbd343474856a67252f3b31d22b3b5a80ad04043.1698851109.git.michal.simek@amd.com
Michal Simek [Wed, 1 Nov 2023 12:06:15 +0000 (13:06 +0100)]
arm64: zynqmp: Add description for nvmem efuse layout
Based on discussion with DT folks at link below there is not going to be
any name restrictions for child names. That's why add description for
current nvmem layout.
Link: https://lore.kernel.org/lkml/20231013101450.573-3-praveen.teja.kundanala@amd.com/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/af81299cafc2bd13ed30dcd69bdf6efb5fbb7f68.1698840373.git.michal.simek@amd.com
Michal Simek [Wed, 1 Nov 2023 11:22:14 +0000 (12:22 +0100)]
ARM: zynq: Add partition description
Xilinx is using standard mtd partition layout for quite a long time. It is
used for testing purpose on evaluation boards.
Also #address/size-cells shouldn't be present without nodes which should
use them that's why move them from zynq-7000.dtsi to nand/nor nodes
directly.
The patch was tested on zc706 and zedboard(with also increasing max
frequency and rx bus width).
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
Michal Simek [Wed, 1 Nov 2023 11:22:13 +0000 (12:22 +0100)]
xilinx: Enable SPI_FLASH_MTD by default
Provide access to qspi flash layout via mtd command.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3c4a3eddb71aab9535b034380d0dbae770828d4.1698837725.git.michal.simek@amd.com
Michal Simek [Wed, 1 Nov 2023 08:01:03 +0000 (09:01 +0100)]
arm64: zynqmp: Comment all smmu entries
SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e868c27c52ded5d8ef25f75ba394b1ab3b31b80a.1698825657.git.michal.simek@amd.com
Michal Simek [Thu, 26 Oct 2023 14:04:52 +0000 (16:04 +0200)]
arm64: versal-net: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a99a8d72201a782fc811715942dea97fb5ab583b.1698329087.git.michal.simek@amd.com
Michal Simek [Thu, 26 Oct 2023 14:04:51 +0000 (16:04 +0200)]
arm64: versal: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9518ab1c4299a45e800b8611172edd78c9243132.1698329087.git.michal.simek@amd.com
Michal Simek [Thu, 26 Oct 2023 14:04:50 +0000 (16:04 +0200)]
ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e7d31a9d9c4a76e171eefc619f31fabd0831a614.1698329087.git.michal.simek@amd.com
Michal Simek [Thu, 26 Oct 2023 14:04:49 +0000 (16:04 +0200)]
ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/28b3cdd7e91b2b4c3c36d0bf65aa5bac042f248c.1698329087.git.michal.simek@amd.com
Michal Simek [Tue, 31 Oct 2023 10:50:54 +0000 (11:50 +0100)]
xilinx: versal: Setup 30MHz as default spi frequency
Align default SPI configuration with ZynqMP/Versal NET.
There is no reason to run on lower frequencies.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c1d6ebd659f3002649b1200c926f8b9ed3132085.1698749448.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Fri, 27 Oct 2023 03:04:46 +0000 (08:34 +0530)]
arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
widths of DMA. This significantly improves read and write throughput.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231027030446.4009-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Michal Simek [Thu, 26 Oct 2023 06:34:31 +0000 (08:34 +0200)]
arm64: zynqmp: Fix Kconfig entry indentation
Use tabs instead of space for entry indentation which is standard coding
style.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff28e719de82258c066f1fedae87f88597f367b5.1698302068.git.michal.simek@amd.com
Michal Simek [Mon, 23 Oct 2023 07:21:53 +0000 (09:21 +0200)]
arm: xilinx: Add missing dual parallel flash description
Describe flash memories based on the latest DT binding.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
Tejas Bhumkar [Fri, 20 Oct 2023 05:06:22 +0000 (10:36 +0530)]
arm64: zynqmp: Disable Tri-state for MIO38 Pin
gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state
is enabled for MIO38, causing inappropriate PHY register reads.
Disabled Tri-state for MIO38 to make HW reset work.
Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208:
00bfe7a3 00000540
Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208:
00bfe7e3 00000540
Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20231020050622.972750-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Ibai Erkiaga [Fri, 13 Oct 2023 12:37:27 +0000 (13:37 +0100)]
zynqmp: migrate gqspi debug to logging
The following patch migrates the usage of debug and printf functions
to the relevant logging function as per U-Boot DM guidelines.
Additionally some of the debugging statements have been rearanged for
a more meaningfull debug experience.
aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at
file level, while is just 5bytes more when disabled.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20231013123739.2757979-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Amit Kumar Mahapatra [Thu, 12 Oct 2023 13:58:21 +0000 (15:58 +0200)]
arm64: dts: zynqmp: make hw-ecc as the default ecc mode
Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 12 Oct 2023 13:39:56 +0000 (15:39 +0200)]
ARM: zynq: Disable the config CONFIG_SPI_FLASH_USE_4K_SECTORS
Lock size for the flashes will be in terms of sector size, so
disable the CONFIG_SPI_FLASH_USE_4K_SECTORS and read it from the
flash itself.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5c2bf3b7e5f366c4e261e8055ea254bda53aa9.1697117993.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Thu, 12 Oct 2023 13:37:52 +0000 (15:37 +0200)]
arm64: zynqmp: Disable the lock option for mini qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/374d6b3a46d19b7ee171dfe8071676098db93e25.1697117869.git.michal.simek@amd.com
Piyush Mehta [Thu, 12 Oct 2023 12:58:51 +0000 (14:58 +0200)]
arm64: zynqmp: remove snps, xhci-stream-quirk property for usb
To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f4ecfe3ea6a4d0d8d8de324f5dffd3efc86656a.1697115523.git.michal.simek@amd.com
Michal Simek [Thu, 12 Oct 2023 12:58:50 +0000 (14:58 +0200)]
arm64: zynqmp: Remove address/size-cells from ams node
Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0ca8d8fe245ad7cb665f5333202d83f70acfc11f.1697115523.git.michal.simek@amd.com
Michal Simek [Thu, 12 Oct 2023 12:58:49 +0000 (14:58 +0200)]
Revert "arm64: zynqmp: Add power domain description for PL"
This reverts commit
d59fac2f3f247470708a1aed1af96802a05e0e61.
This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ed2a46383c6918fbbaca2d618459b1ee58f865c.1697115523.git.michal.simek@amd.com
Michal Simek [Thu, 12 Oct 2023 12:58:48 +0000 (14:58 +0200)]
arm64: zynqmp: Remove xlnx,zynqmp-aes node
AES can be discovered via firmware interface that's why remove node for it.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/eaf575a6ca92f8c10cefb447c08c1292025deb74.1697115523.git.michal.simek@amd.com
Michal Simek [Thu, 12 Oct 2023 12:58:47 +0000 (14:58 +0200)]
arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
Michal Simek [Thu, 12 Oct 2023 08:22:16 +0000 (10:22 +0200)]
arm64: zynqmp: Remove fclk driver
fclk will never go upstream that's why removing this node from DT.
All PL (programmable logic) based IPs should handle clocks self without
using this workaround.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fbb8665b8a58dbe96349abfe5492a509939e165b.1697098930.git.michal.simek@amd.com
Venkatesh Yadav Abbarapu [Wed, 11 Oct 2023 03:15:15 +0000 (08:45 +0530)]
spi: cadence_ospi_versal: Add support for 64-bit address
When 64-bit address is passed only lower 32-bit address
is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011031515.4151-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Wed, 11 Oct 2023 02:56:47 +0000 (08:26 +0530)]
drivers: firmware: Handle error case in the zynqmp_pm_feature
Unhandled error coming from xilinx_pm_request() but return
value is not read back that's why getting sparse warning
as below:
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
In case of error return the "ret" value.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011025647.17200-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Tue, 3 Oct 2023 03:17:15 +0000 (08:47 +0530)]
arm64: versal_net: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-4-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Tue, 3 Oct 2023 03:17:14 +0000 (08:47 +0530)]
arm64: versal: Disable the lock option for mini ospi and qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Venkatesh Yadav Abbarapu [Tue, 3 Oct 2023 03:17:13 +0000 (08:47 +0530)]
mtd: spi-nor: Add spi flash lock config option
Provide an explicit configuration option to disable default "lock"
of any flash chip which supports locking. By disabling the lock
config will save some amount of memory and also don't expose the
lock functionality to the users i.e., via sf protect command.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Algapally Santosh Sagar [Thu, 21 Sep 2023 11:20:43 +0000 (16:50 +0530)]
serial: zynqmp: Fetch baudrate from dtb and update
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.
To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit
c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.
The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.
Also add test to cover this new function.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Algapally Santosh Sagar [Thu, 21 Sep 2023 11:20:42 +0000 (16:50 +0530)]
configs: Add support in Kconfig and convert for armada boards
Move the DEFAULT_ENV_IS_RW to Kconfig for easier configuration.
Hence, add the CONFIG_DEFAULT_ENV_IS_RW config to the defconfig files
to allow enabling them for armada boards.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230921112043.3144726-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Mon, 6 Nov 2023 19:46:41 +0000 (14:46 -0500)]
Prepare v2024.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 6 Nov 2023 19:41:58 +0000 (14:41 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 6 Nov 2023 15:20:42 +0000 (10:20 -0500)]
Merge branch '2023-11-06-assorted-changes'
- One new MIPS platform and a mailmap update
Heinrich Schuchardt [Mon, 6 Nov 2023 09:09:08 +0000 (01:09 -0800)]
.mailmap: map Pali Rohár
Pali expressed that he does not want to receive mails relating to his past
contributions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Linus Walleij [Tue, 26 Sep 2023 09:23:39 +0000 (11:23 +0200)]
bmips: Add Inteno XG6846 board
This adds support for the Inteno XG6846 board based on the
Broadcom MIPS 6328 SoC.
The default boot will read a uImage from flash and boot it.
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tom Rini [Mon, 6 Nov 2023 14:47:13 +0000 (09:47 -0500)]
Merge tag 'u-boot-amlogic-
20231106' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- fixup to also enabled DFU RAM boot for libretech-ac
- sm fix to bind child sm devices in the device tree
- add missing A1 clocks for USB stack
Tom Rini [Mon, 6 Nov 2023 14:45:33 +0000 (09:45 -0500)]
Merge branch '2023-11-06-networking-updates'
- A few dhcp related improvements, be clearer to the user when we don't
have a MAC address, assorted driver/phy improvements and new drivers.
Neil Armstrong [Thu, 2 Nov 2023 13:49:58 +0000 (14:49 +0100)]
ARM: configs: libretech-ac: enable USB_DFU like in meson64.h
USB_DFU was added in meson64.h but is missing in libretech-ac.h,
fix this to enable DFU RAM boot for libretech-ac.
Fixes
4aa027b3f8 ("configs: meson64: add alternate USB DFU boot target")
Link: https://lore.kernel.org/r/20231102-libretech-ac-fix-dfu-v1-1-112379165028@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Dmitry Rokosov [Wed, 1 Nov 2023 14:04:57 +0000 (17:04 +0300)]
drivers: sm: bind child sm devices in the device tree
One well-known sm child device that provides secure power control is the
Secure Power Controller. This device utilizes SMC calls to communicate
with power domains on the secure monitor side.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-3-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Alexey Romanov [Wed, 1 Nov 2023 14:04:56 +0000 (17:04 +0300)]
clk: a1: add new clocks for USB stack
Since we sync device tree with Linux, we have to add this
clock definition for USB stack.
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Baruch Siach [Wed, 25 Oct 2023 08:08:44 +0000 (11:08 +0300)]
net: designware: add DMA offset awareness
Older DesignWare Ethernet MAC versions that this driver supports can
only work with 32-bit DMA source/destination addresses. Some platforms
have no physical RAM at the lowest 4GB address space. For these
platforms the driver must translate DMA addresses to/from physical
memory addresses.
Call translation routines so that properly configured platforms can use
the DesignWare Ethernet MAC. For platforms using device-tree this
usually means adding dma-ranges property to the bus the device node is
in.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Fabio Estevam [Fri, 20 Oct 2023 12:41:51 +0000 (09:41 -0300)]
net: eth-uclass: Improve error message when MAC is not found
While bringinp up a new board without the MAC fuses programmed,
the following error message was observed:
Error: ethernet@
30bf0000 address not set.
Improve the error message to make it clearer the reason of
the failure.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Bin Meng [Wed, 11 Oct 2023 10:58:25 +0000 (18:58 +0800)]
net: e1000: Drop e1000_eth_ids[]
e1000_eth_ids holds compatible strings for e1000 devices, but it
is meaningless as e1000 is a PCI device and there is no such
compatible string assigned to e1000 by the DT bindings community.
Drop it.
Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Sun, 8 Oct 2023 01:53:12 +0000 (21:53 -0400)]
net: Add option for tracing packets
Add an option to trace all packets send/received. This can be helpful when
debugging protocol issues, as the packets can then be imported into
wireshark [1] and analyzed further.
[1] https://www.wireshark.org/docs/wsug_html_chunked/ChIOImportSection.html
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Frank de Brabander [Fri, 6 Oct 2023 12:24:39 +0000 (14:24 +0200)]
net: phy: TI DP83869 fix invalid clock delay configuration
Setting the clock delay from the device tree settings
rx-internal-delay-ps and tx-internal-delay-ps was broken:
- The expected value in the device tree is suppose to be a
delay in picoseconds, but the driver only allowed an array index.
- Driver converted this array index to the actual delay in
picoseconds and tried to apply this in the device register. This
however is not a valid register value. The actual logic here was
reversed, it converted an register representation of the delay to
the device tree delay in picoseconds.
Only when the internal delays were NOT configured in the device tree
and they default value of 7 (=2000ps) was used, a valid value was
loaded in the register.
Signed-off-by: Frank de Brabander <debrabander@gmail.com>
Michal Simek [Fri, 15 Sep 2023 14:10:06 +0000 (16:10 +0200)]
net: eth-uclass: Setup ROM source only when ROM reading passes
There is no reason to setup ROM source if read_rom_hwaddr hook doesn't
exist or reading mac address fails. It is ending up with confusion about
mac address source.
It is nicely visible if you put mac address to DT as
local-mac-address = [ff ff ff ff ff ff];
but also save ethaddr to variables
setenv -f ethaddr 02:18:31:7e:3e:01
Before this patch U-Boot prints that source is ROM
Address in ROM is ff:ff:ff:ff:ff:ff
Address in environment is 02:18:31:7e:3e:01
After that source is DT:
Address in DT is ff:ff:ff:ff:ff:ff
Address in environment is 02:18:31:7e:3e:01
Signed-off-by: Michal Simek <michal.simek@amd.com>
Yang Xiwen [Tue, 22 Aug 2023 17:03:43 +0000 (01:03 +0800)]
net: add hifemac_mdio MDIO bus driver for HiSilicon platform
It adds the driver for the internal MDIO bus of HIFEMAC Ethernet
controller. It's based on the mainstream linux driver.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Yang Xiwen [Tue, 22 Aug 2023 17:03:42 +0000 (01:03 +0800)]
net: add hifemac Ethernet driver for HiSilicon platform
It adds the driver for HIFEMAC Ethernet controller found on HiSilicon
SoCs like Hi3798MV200. It's based on the mainstream linux driver, but
quite a lot of code gets rewritten and cleaned up to adopt u-boot driver
model.
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Robert Marko [Tue, 8 Aug 2023 16:05:16 +0000 (18:05 +0200)]
net: mv88e6xxx: add Clause 45 support
Marvell LinkStreet switches support Clause 45 MDIO on the internal bus.
C45 read or writes require the register address to be written first to
the SMI PHY Data register, and then a special C45 Write Address Register
OP is used on the SMI PHY Register before making a C45 Read Data Register
OP and being able to actually read the register.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Robert Marko [Tue, 8 Aug 2023 16:05:15 +0000 (18:05 +0200)]
net: mv88e6xxx: use generic bitfield macros for MDIO
Driver is currently defining the mask and bit shifting itself,
there is no need for that as U-Boot has generic bitfield macros that help
us achieve the same result but in a cleaner way.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Dylan Hung [Thu, 27 Jul 2023 01:58:14 +0000 (09:58 +0800)]
net: ftgmac100: Add reset control
Add optional reset control, especially for the Aspeed SOC. For the
hardware without a reset line, the reset assertion/deassertion will be
skipped.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Sean Edmond [Tue, 25 Jul 2023 23:20:30 +0000 (16:20 -0700)]
net: Get pxe config file from dhcp option 209
Allow dhcp server pass pxe config file full path by using option 209
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Sean Edmond [Tue, 25 Jul 2023 23:13:29 +0000 (16:13 -0700)]
net: dhcp6: Fix OPT_BOOTFILE_PARAM parsing
RFC 5970 states that OPT_BOOTFILE_PARAM (option 60) can be
multiple parameters that start with a 16-bit length field followed
by the parameter. For example:
[ param-len 1 (16-bits) ] [ parameter 1 (variable length) ]
This fix ensure we're considering "param-len 1" in the parsing.
Signed-off-by: Sean Edmond <seanedmond@microsoft.com>
Ley Foon Tan [Fri, 9 Dec 2022 06:33:14 +0000 (14:33 +0800)]
net: dw_eth_qos: Add 64-bit addressing
Set upper 32bit address for DMA descriptors and buffer address to support
64-bit addressing.
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Tom Rini [Sat, 4 Nov 2023 13:55:39 +0000 (09:55 -0400)]
Merge branch '2023-11-03-assorted-tegra-improvements'
- Assorted improvements for Tegra platforms
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:08 +0000 (10:49 +0300)]
sysreset: implement PALMAS sysreset functions
PALMAS PMIC family has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:07 +0000 (10:49 +0300)]
sysreset: implement TPS65910 sysreset functions
TPS65910/TPS65911 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:06 +0000 (10:49 +0300)]
sysreset: implement TPS80031 sysreset functions
TPS80031/TPS80032 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:05 +0000 (10:49 +0300)]
sysreset: implement MAX77663 sysreset functions
MAX77663 PMIC has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:04 +0000 (10:49 +0300)]
arm: mach-tegra: enable sysreset driver
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 24 Oct 2023 07:49:03 +0000 (10:49 +0300)]
sysreset: tegra: create arch specific sysreset driver
Tegra uses built in Power Management Controller (PMC) to perform
CPU reset. Code to perform this was located in mach-tegra, so lest
create DM driver to handle this.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:15 +0000 (11:26 +0300)]
power: regulator: tps65911: add regulator support
The driver provides regulator set/get voltage enable/disable
functions for TI TPS5911 PMIC.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:14 +0000 (11:26 +0300)]
power: pmic: tps65910: add TPS65911 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:13 +0000 (11:26 +0300)]
power: regulator: tps80031: add regulator support
The driver provides regulator set/get voltage enable/disable
functions for TI TPS80031/TPS80032 PMICs.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:12 +0000 (11:26 +0300)]
power: pmic: add the base TPS80031 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:11 +0000 (11:26 +0300)]
power: regulator: max77663: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for MAXIM MAX77663 PMICs.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:10 +0000 (11:26 +0300)]
power: pmic: add the base MAX77663 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:09 +0000 (11:26 +0300)]
power: regulator: palmas: fix ldoln and ldousb detection
dev->driver_data will carry the tail of ldo if there is a number and
if there is no number it will be an error code, anyway it will not be
zero. This results in a wrong ldo regulator detection.
To avoid this check for non-numerical ldo first and then manipulate
dev->driver_data.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 27 Oct 2023 08:26:08 +0000 (11:26 +0300)]
power: pmic: palmas: support TI TPS65913 PMIC
Existing PALMAS PMIC driver is fully compatible with TI TPS65913
PMIC found in many Tegra 4 devices, like Tegra Note 7 and ASUS
TF701T. TPS65913 shares same structure of regulators like TPS659038
so data can be reused.
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # NVIDIA Tegratab
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:47 +0000 (09:36 +0300)]
board: asus: lg: move config fragments into device boards
Move ASUS Transformers, Grouper, P895 and P880 config fragments into
their respective device directory in /board/../configs/
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:46 +0000 (09:36 +0300)]
board: tegra30: remove nvidia_board_late_init calls
Remove nvidia_board_late_init calls from board since this setup is
performed in board2 of mach-tegra. Call of nvidia_board_late_init
from within the board does not provide any additional data.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformer T30
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # LG P895 T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:45 +0000 (09:36 +0300)]
ARM: tegra: board2: add generic late init
Board specific late init allows vendors to set up different device
or board specific env variables (like serial number, platform name).
In case this information is missing, u-boot will lack info regards
serial or platform.
To avoid this prior nvidia_board_late_init internal generic function
is called which fills required data. In this case platform name is
obtained from get_chip and serialno is filled with SoC id.
Though SoC id is not dedicated to be devices serial but it fits well
in case of restriction of data about device and since SoC is basically
a main chip of the device.
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Transformers
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:44 +0000 (09:36 +0300)]
ARM: tegra20: tegra30: support EBTUPDATE on non-encrypted devices
Re-crypt support was extended to devices without burnt SBK. In case
SBK is not set, place from where it is read is filled with zeroes.
This patch adds support for ebtupdate function to detect nosbk device
and avoid crypto operations for it.
Tested-by: Maksim Kurnosenko <asusx2@mail.ru>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:43 +0000 (09:36 +0300)]
ARM: tegra114: enable base voltages setup from board
Tegra 4, same as Tegra 3, requires configuration of CPU and CORE
voltages in the SPL stage to boot properly. Expose function to be
able perform this configuration in the SPL section of the device
board.
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF701T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:42 +0000 (09:36 +0300)]
configs: grouper: drop I2C_MUX
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:41 +0000 (09:36 +0300)]
ARM: dts: grouper: complete missing bindings
Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:40 +0000 (09:36 +0300)]
ARM: dts: lg-x3: complete missing bindings
Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:39 +0000 (09:36 +0300)]
ARM: dts: endeavoru: complete missing bindings
Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:38 +0000 (09:36 +0300)]
ARM: dts: transformer-t30: complete missing bindings
Clean up the tree and prepare for DM PMIC migration.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:37 +0000 (09:36 +0300)]
configs: transformer_t30: convert bootmenu option
Convert refresh USB to enter console. Transformers have full size
USB and a dock keyboard so access to U-Boot console would be handy.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:36 +0000 (09:36 +0300)]
board: asus: transformer-t30: remove PMIC GPIOs configuration
Default configuration matches values which are set in the board
so this configuration is not required.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Tue, 3 Oct 2023 06:36:35 +0000 (09:36 +0300)]
ARM: dts: tf201: configure dock USB phy
TF201 unlike other transformers uses non-fused xcvr value for
its dock USB port. With out it dock USB and SD reader will not
work.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>