From 24f85482c90227d6ba4cc3739874bae7e8969a62 Mon Sep 17 00:00:00 2001
From: =?utf8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Mon, 22 May 2017 20:01:46 +0200
Subject: [PATCH] dm: serial: bcm6345: fix baud rate clock calculation
MIME-Version: 1.0
Content-Type: text/plain; charset=utf8
Content-Transfer-Encoding: 8bit

It's currently bugged and doesn't work for even cases.
Right shift bits instead of dividing and fix even cases.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
 drivers/serial/serial_bcm6345.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c
index 14c1bf26c1..0843b48bea 100644
--- a/drivers/serial/serial_bcm6345.c
+++ b/drivers/serial/serial_bcm6345.c
@@ -157,11 +157,11 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate)
 			UART_FIFO_CFG_TX_4);
 
 	/* set baud rate */
-	val = (clk / baudrate) / 16;
+	val = ((clk / baudrate) >> 4);
 	if (val & 0x1)
-		val = val;
+		val = (val >> 1);
 	else
-		val = val / 2 - 1;
+		val = (val >> 1) - 1;
 	writel_be(val, base + UART_BAUD_REG);
 
 	/* clear interrupts */
@@ -243,7 +243,7 @@ static int bcm6345_serial_probe(struct udevice *dev)
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret < 0)
 		return ret;
-	priv->uartclk = clk_get_rate(&clk) / 2;
+	priv->uartclk = clk_get_rate(&clk);
 	clk_free(&clk);
 
 	/* initialize serial */
-- 
2.39.5