From: Alexander Dahl <ada@thorsis.com>
Date: Thu, 21 Jul 2022 13:31:21 +0000 (+0200)
Subject: fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
X-Git-Tag: v2025.01-rc5-pxa1908~1335^2~20
X-Git-Url: http://git.dujemihanovic.xyz/img/html/static/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=e8ffc1dfcb1b4a7465ae7ec2b45569f0f27ff501;p=u-boot.git

fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig

After commit 8cca60a2cbf2 ("Kconfig: Remove some symbols from the
whitelist") downstream builds failed for boards setting this in
include/configs/…

Signed-off-by: Alexander Dahl <ada@thorsis.com>
Link: https://lore.kernel.org/r/20220721133122.32428-2-ada@thorsis.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
---

diff --git a/README b/README
index ff0df3797d..8c31e5c0e3 100644
--- a/README
+++ b/README
@@ -1346,9 +1346,6 @@ The following options need to be configured:
 		If defined, a function that provides delays in the FPGA
 		configuration driver.
 
-		CONFIG_SYS_FPGA_CHECK_CTRLC
-		Allow Control-C to interrupt FPGA configuration
-
 		CONFIG_SYS_FPGA_CHECK_ERROR
 
 		Check for configuration errors during FPGA bitfile
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 76719517f5..78d9588e4b 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -91,4 +91,10 @@ config FPGA_ZYNQPL
 	  Enable FPGA driver for loading bitstream in BIT and BIN format
 	  on Xilinx Zynq devices.
 
+config SYS_FPGA_CHECK_CTRLC
+	bool "Allow Control-C to interrupt FPGA configuration"
+	depends on FPGA
+	help
+	  User can interrupt FPGA configuration by pressing CTRL+C.
+
 endmenu
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b3e0537bab..0fd2290e3d 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -45,13 +45,6 @@
 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
 #endif
 
-/*
- * Don't allow config cycle to be interrupted
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
-#undef CONFIG_SYS_FPGA_CHECK_CTRLC
-#endif
-
 /*
  * Check for errors during configuration by default
  */