From: Guillaume GARDET <guillaume.gardet@free.fr>
Date: Wed, 2 Jan 2019 13:31:41 +0000 (+0100)
Subject: exynos: allow SPL to build in thumb mode
X-Git-Tag: v2025.01-rc5-pxa1908~3191^2~1
X-Git-Url: http://git.dujemihanovic.xyz/img/html/%7B%7B%20%28.OutputFormats.Get?a=commitdiff_plain;h=2a195703d6e62172e532ffae05a79e9d12f602bc;p=u-boot.git

exynos: allow SPL to build in thumb mode

Building peach-pi smdk5420 and peach-pit with thumb mode for SPL
ends-up in the following error:

Error: Thumb encoding does not support an immediate here -- `msr cpsr_c,#0x13|0xC0'

Use an intermediate register to be able to use thumb for exynos5 SPL.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>

Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
---

diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h
index 4837781957..81fa9800b4 100644
--- a/arch/arm/mach-exynos/include/mach/system.h
+++ b/arch/arm/mach-exynos/include/mach/system.h
@@ -58,7 +58,8 @@ struct exynos5_sysreg {
 /* Move 0xd3 value to CPSR register to enable SVC mode */
 #define svc32_mode_en() __asm__ __volatile__				\
 			("@ I&F disable, Mode: 0x13 - SVC\n\t"		\
-			 "msr     cpsr_c, #0x13|0xC0\n\t" : : )
+			 "mov     r0, #0x13|0xC0\n\t"			\
+			 "msr     cpsr_c, r0\n\t" : : )
 
 /* Set program counter with the given value */
 #define set_pc(x) __asm__ __volatile__ ("mov     pc, %0\n\t" : : "r"(x))