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diff --git a/arch/arm/dts/pxa1908.dtsi b/arch/arm/dts/pxa1908.dtsi
index 41ffe0ea898ff8a741096ea6b990489368f333fe..e8ec2606c2515ee2031004ab3102fec37b7d4b87 100644 (file)
--- a/arch/arm/dts/pxa1908.dtsi
+++ b/arch/arm/dts/pxa1908.dtsi
@@ -16,28 +16,28 @@
 
                cpu0: cpu@0 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 0>;
                        enable-method = "psci";
                };
 
                cpu1: cpu@1 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 1>;
                        enable-method = "psci";
                };
 
                cpu2: cpu@2 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 2>;
                        enable-method = "psci";
                };
 
                cpu3: cpu@3 {
                        device_type = "cpu";
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        reg = <0 3>;
                        enable-method = "psci";
                };
@@ -82,21 +82,21 @@
                        ranges = <0 0 0xd4000000 0x200000>;
 
                        uart0: serial@17000 {
-                               compatible = "ns16550";
+                               compatible = "mrvl,mmp-uart", "intel,xscale-uart";
                                reg = <0x17000 0x1000>;
                                clock-frequency = <14745600>;
                                reg-shift = <2>;
                        };
 
                        uart1: serial@18000 {
-                               compatible = "ns16550";
+                               compatible = "mrvl,mmp-uart", "intel,xscale-uart";
                                reg = <0x18000 0x1000>;
                                clock-frequency = <14745600>;
                                reg-shift = <2>;
                        };
 
                        uart2: serial@36000 {
-                               compatible = "ns16550";
+                               compatible = "mrvl,mmp-uart", "intel,xscale-uart";
                                reg = <0x36000 0x1000>;
                                clock-frequency = <117000000>;
                                reg-shift = <2>;

diff --git a/configs/coreprimevelte_defconfig b/configs/coreprimevelte_defconfig
index 3815bb09fee552dad88f77c7a5fe62d381f1be60..05116669200b3f1393518c8f9d1d0d5b9f90db6f 100644 (file)
--- a/configs/coreprimevelte_defconfig
+++ b/configs/coreprimevelte_defconfig
@@ -10,11 +10,9 @@ CONFIG_TARGET_COREPRIMEVELTE=y
 CONFIG_SYS_LOAD_ADDR=0x1000000
 CONFIG_ARMV8_PSCI=y
 CONFIG_FIT=y
+# CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_HUSH_PARSER=y
-CONFIG_CMD_CPU=y
 CONFIG_CMD_DM=y
 CONFIG_OF_BOARD=y
-CONFIG_CPU=y
-CONFIG_CPU_ARMV8=y
 CONFIG_SYS_NS16550=y
 CONFIG_SYS_NS16550_MEM32=y

diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 3f6860f39162df74c3d1f03d3f9aa90090216646..eab193395087877d2a8da38e1b4daabf46e81f2f 100644 (file)
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -614,6 +614,7 @@ static const struct udevice_id ns16550_serial_ids[] = {
        { .compatible = "ingenic,jz4780-uart",  .data = PORT_JZ4780  },
        { .compatible = "nvidia,tegra20-uart",  .data = PORT_NS16550 },
        { .compatible = "snps,dw-apb-uart",     .data = PORT_NS16550 },
+       { .compatible = "intel,xscale-uart",    .data = PORT_NS16550 },
        {}
 };
 #endif /* OF_REAL */

diff --git a/include/configs/pxa1908.h b/include/configs/pxa1908.h
index 1071c32bfa2dc0b49e0f12341b6405d63ea4bcd5..b0d6cdfeb760e215ff4a0e75d3d071c3a58ff82e 100644 (file)
--- a/include/configs/pxa1908.h
+++ b/include/configs/pxa1908.h
@@ -3,6 +3,10 @@
  * Copyright (c) 2024
  * Duje Mihanović <duje.mihanovic@skole.hr>
  */
+
+#ifndef __PXA1908_H
+#define __PXA1908_H
+
 #define CFG_SYS_SDRAM_BASE     0x1000000
 #define CFG_SYS_INIT_RAM_ADDR  0x10000000
 #define CFG_SYS_INIT_RAM_SIZE  0x4000
@@ -10,3 +14,5 @@
 #define CFG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 }
 #define CFG_EXTRA_ENV_SETTINGS \
        "bootcmd=bootm $prevbl_initrd_start_addr\0"
+
+#endif