From eb70d05d740c1d82474d2c31242a4e995584de24 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andreas=20Bie=C3=9Fmann?= <biessmann@corscience.de> Date: Wed, 9 Jun 2010 14:13:45 +0200 Subject: [PATCH] avr32: disable branch folding MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Due to a hardware bug mentioned in latest AP7000 datasheet errata (revision M from 09.09) branch folding is unreliable. This patch disables CPUCR.FE bitfield as stated in datasheet. Signed-off-by: Andreas Bießmann <biessmann@corscience.de> --- arch/avr32/cpu/start.S | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/avr32/cpu/start.S b/arch/avr32/cpu/start.S index d37a46eb18..99c9e06cb8 100644 --- a/arch/avr32/cpu/start.S +++ b/arch/avr32/cpu/start.S @@ -27,9 +27,10 @@ #define SYSREG_MMUCR_S_OFFSET 4 #define SR_INIT (SYSREG_BIT(GM) | SYSREG_BIT(EM) | SYSREG_BIT(M0)) -#define CPUCR_INIT (SYSREG_BIT(BI) | SYSREG_BIT(BE) \ - | SYSREG_BIT(FE) | SYSREG_BIT(RE) \ - | SYSREG_BIT(IBE) | SYSREG_BIT(IEE)) +/* due to errata (unreliable branch folding) clear FE bit explicitly */ +#define CPUCR_INIT ((SYSREG_BIT(BI) | SYSREG_BIT(BE) \ + | SYSREG_BIT(RE) | SYSREG_BIT(IBE) \ + | SYSREG_BIT(IEE)) & ~SYSREG_BIT(FE)) /* * To save some space, we use the same entry point for -- 2.39.5