From e1e332c8f2e5cac70566998a0ba0ccfdea437f10 Mon Sep 17 00:00:00 2001
From: Simon Glass <sjg@chromium.org>
Date: Fri, 3 Jul 2015 18:28:21 -0600
Subject: [PATCH] dm: spi: Correct status register access width
The status register on ICH9 is a single byte, so use byte access when
writing to it, to avoid updating the control register also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
---
drivers/spi/ich.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index 6b6cfbf375..66a5cbaaa1 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -411,6 +411,7 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
const void *dout, void *din, unsigned long flags)
{
struct udevice *bus = dev_get_parent(dev);
+ struct ich_spi_platdata *plat = dev_get_platdata(bus);
struct ich_spi_priv *ctlr = dev_get_priv(bus);
uint16_t control;
int16_t opcode_index;
@@ -477,7 +478,10 @@ static int ich_spi_xfer(struct udevice *dev, unsigned int bitlen,
if (ret < 0)
return ret;
- ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+ if (plat->ich_version == 7)
+ ich_writew(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
+ else
+ ich_writeb(ctlr, SPIS_CDS | SPIS_FCERR, ctlr->status);
spi_setup_type(trans, using_cmd ? bytes : 0);
opcode_index = spi_setup_opcode(ctlr, trans);
--
2.39.5