From 3982e761dcdec45db17207dee3851397fe23f45d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org> Date: Thu, 28 Jul 2022 11:10:12 +0800 Subject: [PATCH] board: freescale: p1_p2_rdb_pc: Simplify SPL offset macros MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Now when CONFIG_SYS_TEXT_BASE has sane value, use it for calculation of other SPL offset values: CONFIG_SPL_MAX_SIZE, CONFIG_SYS_MMC_U_BOOT_* and CONFIG_SYS_SPI_FLASH_U_BOOT_* macros. No functional change. Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- include/configs/p1_p2_rdb_pc.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index a0d583040c..ba04029df8 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -78,14 +78,14 @@ #ifdef CONFIG_SDCARD #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) -#define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) +#define CONFIG_SYS_MMC_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MMC_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MMC_U_BOOT_OFFS CONFIG_SPL_PAD_TO #elif defined(CONFIG_SPIFLASH) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) -#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) +#define CONFIG_SYS_SPI_FLASH_U_BOOT_DST CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_SPI_FLASH_U_BOOT_START CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS CONFIG_SPL_PAD_TO #elif defined(CONFIG_MTD_RAW_NAND) #ifdef CONFIG_TPL_BUILD #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) -- 2.39.5