From: Simon Glass <sjg@chromium.org>
Date: Wed, 21 Aug 2024 16:19:05 +0000 (-0600)
Subject: global_data: Remove pci_ram_top
X-Git-Url: http://git.dujemihanovic.xyz/img/%7B%7B%20.RelPermalink%20%7D%7D?a=commitdiff_plain;h=7d08262ec37219b9c6d9285b17c7af8fb2ea562a;p=u-boot.git

global_data: Remove pci_ram_top

This field is set but not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 479137e457..7971e3b68d 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -423,10 +423,6 @@ int dram_init_banksize(void)
 	gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = usable_ram_size_below_4g();
 
-#ifdef CONFIG_PCI
-	gd->pci_ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
-#endif
-
 #ifdef CONFIG_PHYS_64BIT
 	if (gd->ram_size > SZ_2G) {
 		gd->bd->bi_dram[1].start = 0x100000000;
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index c12543d71a..e2342b2aec 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -189,10 +189,6 @@ int cboot_dram_init_banksize(void)
 		gd->bd->bi_dram[i].size = tegra_mem_map[1 + i].size;
 	}
 
-#ifdef CONFIG_PCI
-	gd->pci_ram_top = ram_top;
-#endif
-
 	return 0;
 }
 
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index db2727d748..934e98ac58 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -412,12 +412,6 @@ int cpu_phys_address_size(void)
 	return 32;
 }
 
-/* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */
-static void setup_pci_ram_top(void)
-{
-	gd_set_pci_ram_top(0x80000000U);
-}
-
 static void setup_mtrr(void)
 {
 	u64 mtrr_cap;
@@ -469,7 +463,6 @@ int x86_cpu_init_f(void)
 		setup_cpu_features();
 	setup_identity();
 	setup_mtrr();
-	setup_pci_ram_top();
 
 	/* Set up the i8254 timer if required */
 	if (IS_ENABLED(CONFIG_I8254_TIMER))
@@ -483,7 +476,6 @@ int x86_cpu_reinit_f(void)
 	long addr;
 
 	setup_identity();
-	setup_pci_ram_top();
 	addr = locate_coreboot_table();
 	if (addr >= 0) {
 		gd->arch.coreboot_table = addr;
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index 7b6c5223e7..ae39738047 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -303,10 +303,6 @@ struct global_data {
 	 * @hose: PCI hose for early use
 	 */
 	struct pci_controller *hose;
-	/**
-	 * @pci_ram_top: top of region accessible to PCI
-	 */
-	phys_addr_t pci_ram_top;
 #endif
 #ifdef CONFIG_PCI_BOOTDELAY
 	/**
@@ -565,12 +561,6 @@ static_assert(sizeof(struct global_data) == GD_SIZE);
 #define gd_set_malloc_start(val)
 #endif
 
-#if CONFIG_IS_ENABLED(PCI)
-#define gd_set_pci_ram_top(val)	gd->pci_ram_top = val
-#else
-#define gd_set_pci_ram_top(val)
-#endif
-
 #if CONFIG_VAL(SYS_MALLOC_F_LEN)
 #define gd_malloc_ptr()		gd->malloc_ptr
 #else