]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: asus: tf600t: adjust LV pinmux
authorSvyatoslav Ryhel <clamor95@gmail.com>
Fri, 19 Jan 2024 11:28:54 +0000 (13:28 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Mon, 22 Apr 2024 09:17:20 +0000 (12:17 +0300)
TF600T is pretty picky in terms of LV pinmux configuration.
The wrong setup will cause issues with eMMC and video.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/dts/tegra30-asus-tf600t.dts

index 86ad925921f456fd819cc9936a8f87b321a1b8a5..06151816c8de8c7ed7b726b10cff94cd341973d3 100644 (file)
@@ -90,6 +90,8 @@
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
 
                        /* SDMMC2 pinmux */
                                                "vi_d2_pl0",
                                                "vi_d3_pl1",
                                                "vi_d5_pl3",
-                                               "vi_d7_pl5";
-                               nvidia,function = "sdmmc2";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-                       };
-                       vi_d8_pl6 {
-                               nvidia,pins = "vi_d8_pl6",
+                                               "vi_d7_pl5",
+                                               "vi_d8_pl6",
                                                "vi_d9_pl7";
                                nvidia,function = "sdmmc2";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-                               nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
 
                        /* SDMMC3 pinmux */
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
                        sdmmc4_cmd {
                                nvidia,pins = "sdmmc4_cmd_pt7",
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
                        sdmmc4_rst_n {
                                nvidia,pins = "sdmmc4_rst_n_pcc3";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_ENABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-                               nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
 
                        /* GPIO keys pinmux */
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
                        };
                        vi_vsync_pd6 {
-                               nvidia,pins = "vi_vsync_pd6",
+                               nvidia,pins = "vi_d0_pt4",
+                                               "vi_d10_pt2",
+                                               "vi_vsync_pd6",
                                                "vi_hsync_pd7";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
-                               nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
-                       vi_d10_pt2 {
-                               nvidia,pins = "vi_d10_pt2",
-                                               "vi_d0_pt4", "pbb0";
+                       pbb0 {
+                               nvidia,pins = "pbb0";
                                nvidia,function = "rsvd2";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
                        };
 
-                       vi_d4_pl2 {
-                               nvidia,pins = "vi_d4_pl2";
+                       vi_d4 {
+                               nvidia,pins = "vi_d4_pl2",
+                                               "vi_d6_pl4";
                                nvidia,function = "vi";
                                nvidia,pull = <TEGRA_PIN_PULL_NONE>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                       };
-                       vi_d6_pl4 {
-                               nvidia,pins = "vi_d6_pl4";
-                               nvidia,function = "vi";
-                               nvidia,pull = <TEGRA_PIN_PULL_NONE>;
-                               nvidia,tristate = <TEGRA_PIN_DISABLE>;
-                               nvidia,enable-input = <TEGRA_PIN_DISABLE>;
-                               nvidia,lock = <0>;
-                               nvidia,ioreset = <0>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
                        vi_mclk_pt1 {
                                nvidia,pins = "vi_mclk_pt1";
                                nvidia,pull = <TEGRA_PIN_PULL_UP>;
                                nvidia,tristate = <TEGRA_PIN_DISABLE>;
                                nvidia,enable-input = <TEGRA_PIN_ENABLE>;
+                               nvidia,lock = <1>;
+                               nvidia,io-reset = <1>;
                        };
 
                        jtag {