/delete-property/ st,eth-ref-clk-sel;
};
-ðernet0_rmii_pins_a {
- pins1 {
- pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
- <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
- <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
- <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RMII_REF_CLK */
- <STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
- <STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
- };
-};
-
&i2c4 {
bootph-all;
bootph-pre-ram;
/delete-property/ reset-gpios;
};
-&pinctrl {
- mco2_pins_a: mco2-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, AF1)>; /* MCO2 */
- bias-disable;
- drive-push-pull;
- slew-rate = <2>;
- };
- };
-
- mco2_sleep_pins_a: mco2-sleep-0 {
- pins {
- pinmux = <STM32_PINMUX('G', 2, ANALOG)>; /* MCO2 */
- };
- };
-};
-
&pmic {
bootph-all;
bootph-pre-ram;