]> git.dujemihanovic.xyz Git - u-boot.git/commit
clk: mediatek: mt7622: add missing clock MUX1_SEL
authorChristian Marangi <ansuelsmth@gmail.com>
Sat, 3 Aug 2024 08:43:23 +0000 (10:43 +0200)
committerTom Rini <trini@konsulko.com>
Mon, 19 Aug 2024 22:15:26 +0000 (16:15 -0600)
commita942c0c3f5d454241cf2c1d61d06a42dcd6a14cc
treea3a1f15b0b516f487ec929908cc501f4939d1626
parent6dfa991204a6fe033a5f0c49ff4f1d6e8af3ed7c
clk: mediatek: mt7622: add missing clock MUX1_SEL

Add missing infra clock MUX1_SEL needed for CPU clock. This is needed to
match the upstream clk ID order in preparation for OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
drivers/clk/mediatek/clk-mt7622.c
include/dt-bindings/clock/mt7622-clk.h