From f07ca7907ef84c55f3b777647271cf783b2b9867 Mon Sep 17 00:00:00 2001
From: Ssunk <ssunkkan@gmail.com>
Date: Tue, 16 Jan 2024 13:38:34 +0800
Subject: [PATCH] mtd: spi: spi-nor-ids: Add more XM25Q series chips
- XM25QH128C
- XM25QH256C
- XM25QU256C
- XM25QH512C
- XM25QU512C
Signed-off-by: Kankan Sun <ssunkkan@gmail.com>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
---
drivers/mtd/spi/spi-nor-ids.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4d3b02766f..6d636f2d1a 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -556,6 +556,10 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("XM25QH64C", 0x204017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ INFO("XM25QU128C", 0x204118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { INFO("XM25QH256C", 0x204019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QU256C", 0x204119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QH512C", 0x204020, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+ { INFO("XM25QU512C", 0x204120, 0, 64 * 1024, 1024, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
#endif
#ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology Limited */
--
2.39.5