From 8fd4c05ceca279630b547262e6584655e5c6d37f Mon Sep 17 00:00:00 2001
From: Frieder Schrempf <frieder.schrempf@kontron.de>
Date: Wed, 24 Aug 2022 15:59:16 +0200
Subject: [PATCH] imx: kontron-sl-mx8mm: Use the VSELECT signal to switch SD
card IO voltage
It turns out that it is not necessary to declare the VSELECT signal as
GPIO and let the PMIC driver set it to a fixed high level. This switches
the voltage between 3.3V and 1.8V by setting the PMIC register for LDO5
accordingly.
Instead we can do it like other boards already do and simply mux the
VSELECT signal of the USDHC interface to the pin. This makes sure that
the correct voltage is selected by setting the PMIC's SD_VSEL input
to high or low accordingly.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
---
arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi | 5 -----
arch/arm/dts/imx8mm-kontron-bl.dts | 3 +++
arch/arm/dts/imx8mm-kontron-sl.dtsi | 2 --
3 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi b/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi
index 2c62f05cec..a42881d1a8 100644
--- a/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-bl-u-boot.dtsi
@@ -62,11 +62,6 @@
&pinctrl_pmic {
u-boot,dm-spl;
- fsl,pins = <
- MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
- /* Disable Pullup for SD_VSEL */
- MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x41
- >;
};
&pinctrl_uart3 {
diff --git a/arch/arm/dts/imx8mm-kontron-bl.dts b/arch/arm/dts/imx8mm-kontron-bl.dts
index ca533baedc..a079322a37 100644
--- a/arch/arm/dts/imx8mm-kontron-bl.dts
+++ b/arch/arm/dts/imx8mm-kontron-bl.dts
@@ -321,6 +321,7 @@
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
>;
};
@@ -333,6 +334,7 @@
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
>;
};
@@ -345,6 +347,7 @@
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
+ MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
>;
};
};
diff --git a/arch/arm/dts/imx8mm-kontron-sl.dtsi b/arch/arm/dts/imx8mm-kontron-sl.dtsi
index 11a50cffc8..7cfa747347 100644
--- a/arch/arm/dts/imx8mm-kontron-sl.dtsi
+++ b/arch/arm/dts/imx8mm-kontron-sl.dtsi
@@ -103,7 +103,6 @@
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
- sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulators {
reg_vdd_soc: BUCK1 {
@@ -246,7 +245,6 @@
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
- MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
>;
};
--
2.39.5